Negative logic means ACTIVE LOW, i.e. the function is triggered on a low level.

Positive logic TTL input would trigger on a 2V noise pulse.
Negative logic TTL input would required 4V noise pulse to trigger, i.e. the pulse has to fall from 5V to below 0.7V to trigger /S or /R.

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While I agree that TTL inputs have somewhat better noise immunity for HI signals than LO signals, it's not as simple as you make it out to be.

If the voltage drops below V_IH then there's no guarantee that it will not be seen as a LO.

V_IL of 0.8 V only guarantees that any voltage less than that WILL be recognized as a LO. In order to do that, the chips HAVE to be designed so that they will actually recognize significantly higher voltages as a LO so that, in WORST CASE, they will still always recognized 0.8 V as a LO.

Similarly, on the flip side, a LO signal doesn't have to get up to 2 V due to noise to be seen as a HI -- anything over 0.8 V and you are in no-man's land and nothing is guaranteed.

Also, the noise doesn't have to take the signal from 5 V down to the point that it is seen as a LO, particularly if it is being driven by other TTL outputs, which typically only get up to about 3.5 V under normal conditions.

The actual transitions point is usually pretty close to the V_TH level of about 1.5 V, so the practical noise margins are much more symmetric, but the HI generally has a bit more immunity.

 

School books and teachers always talk about antique TTL logic ICs and the very old 741 opamp.

 

School books and teachers always talk about antique TTL logic ICs and the very old 741 opamp.

Agreed. Every time I see a question about a 741 or 74 series TTL I wonder "is this homework?" because anyone actually working in electronics wouldn't be using them. In fact, where would you get 74-series TTL these days?
(Although I do use the occasional LM358 for 0-10V outputs)

 

7400 TTL negative logic provides a 4V noise threshold as compared to a 2V positive logic pulse.

Be that as it may, I quite sure the primary reason for having negative low on standard TTL gates was to minimize power consumption, since those inputs typically spend most of their time not active.