I wanna use FPGA for driving CCD.(Driving Timing and clock driving). My CCD is ilx511. What type pf FPGA do you recommend? Does everybody any experice about it? Or any schematics for using a type of FPGA?

 

Since a CCD is basically an analog device, you will need to use an A/D converter to decode the output. Page 6 in the datasheet you forgot to post shows how the timing works.
Basically any FPGA should work, but it really depends on what you want to do with the data once you have it.

 

For simple clock and timing, an enexpensive FPGA will do. Look at Xilinx Spartan or Altera Cyclone offerings. First, determine how many different pins you need, then decide how much logic you need and what the clock rates need to be. Use spec tables to chose your device based on these requirement. Most likely, the least expensive device will be more than adequate.

 

Thanks for helping, Can anyone help me about timing driving and clock driving ilx511?

 

For simple clock and timing, an enexpensive FPGA will do. Look at Xilinx Spartan or Altera Cyclone offerings. First, determine how many different pins you need, then decide how much logic you need and what the clock rates need to be. Use spec tables to chose your device based on these requirement. Most likely, the least expensive device will be more than adequate.

What expensive FPGA means?

 

Thanks for helping, Can anyone help me about timing driving and clock driving ilx511?

Could you be more specific?

 

What expensive FPGA means?

Sorry, I meant inexpensive. That means low cost.

 

I searched alot about FPGA.
Untill now, XCV300E, XCS2040, XC3S400, EPF10KTC144 and cyclone FPGA are used for driving CCD. I wanna choose one of them for driving ilx511. Which of them do you suggest?

 

Does anyone know XCS2040? I studied a paper about ilx511 and XCS2040. But I can not it's datasheet.

 

Forget about Virtex parts like the xcv300... Use the Spartan or Cyclone. They are cheaper and completely adequate for your application. Use the low cost Cyclone E variant, example the 5cea2. First you should have designed and simulated your code. Then you can use free Altera Quartus tools to try to build your project for the low cost Cyclone. After successfully building the deisgn, you'll know for sure if the part will meet you needs for speed and logic resources.

 

Hi guys.
I decided to interface ilx511 with atmega....
I collected some data about interfacing but I have some problems....Please help me...
I red Ilx511 datasheet some times, I got that when the gate pulse (QROG) is high while clock pulse creates square waves to tell the sensor to shift along the pixels in the array.
And when the gate pulse goes from high to low and stayes low tells the sensor to restart.

So, For Clock pulse I should generate a pulse with 50% duty cycle (Squere pulse).
To interface my atmega to read data from the ilx511 I need to read the data at every clock transition. I have created a 1MHz clock from my Atmega to provide to the ilx511 clock using the code below.

void timer0_init(void)
{
   // Output compare pin controlled by a timer and tied to a specific
   // pin number you cannot change
   // i.e. OC0 = PB4 , OC1A = PB5 etc
   // Runs in CTC mode so the OC0 pin will be applied directly by the timer
   // by setting propoer COMxx in TCCR0

   TCCR0 = 0x00; //stop
   ASSR = 0x00; //set async mode
   TCNT0 = 0xF8; //set count
   OCR0 = 0x07;
   TCCR0 = 0x19; //start timer
   DDRB |= (1 << PB4); // Toggle Pin PB4

// Enable Timer 0 interrupt to start interrupt (i.e OCIE0 in TIMSK)
   TIMSK |= (1<<OCIE0);   // Set OCIE0 Timer 0 interrupt

}

My intention is to use the Atmega analog comparator to read the ilx511 output value and provide a 0 or 1 into my data storage array.
What I need to do is read a ilx511 output every clock transition (i.e. 500nSecs for 2Mhz) and store the value from the analog comparator. I have tried to synchronise an interrupt to work in conjunction with my Atmega 1MHz clock pulse to do the output recording as below:
ISR(TIMER0_COMP_vect)
{

//Read ilx511 output !

}

But I have a problem about maching the speed of every interrupt and that of atmega. At 16MHz a cycle is 62.5ns.

What do you suggest about matching the time and cycles?

 

Nobody has no idea?
What about generating a wave pulse for clock timing and Rog timing of ilx511?
What frequency should be clk timing?

 

You haven't really described your problem. You said you have a problem matching the speed, but you've given no more details. I don't know enough about your problem to make any suggestions. What is Rog timing?

 

Especially when you were first talking about clocking it with an FPGA and now you are talking about atmega. Those are two vastly different beasts with very different capabilities.

 

Okay, I know. First I wanted to do it with FPGA and now, I know that I can do it with Atmega128, So I want to know the basis of timing.

 

I think you want to use a timer to generate the clock, and use that also to generate an interrupt that reads the comparator.
The biggest problem I see here is where are you gonna store all those bits, as atmega has very little memory and stuffing the bits into bytes will be really slow.

 

Hi guys,
I am driving ilx511 with atmega128,So I wrote the below code for it...is it correct? Do you have anu idea about it?

while (1)
      { 
                           TCCR1A=0x50;
                     TCCR1B=0x09;
                     OCR1AL=0x39;

                     
                   for(j=1; j<2087 ;j++)
                     {
                     xx[j]=0;
                     }
                
                 ROG=1; 
                 for(i=0;i<20;i++);
               
                 ROG=0; 
               
                 for(n=0;n<20;n++);
                {                 
               
                 for(i=0;i<20;i++);
                 ROG=1;
                  
                       for(k=1; k<2087 ;k++)
                      {

                             flag=0;
                                 if (TIFR & (1 << OCF1A)) //bit is HIGH in TIFR
                                { 
                                 TIFR = (1 << OCF1A);  //clear the CTC flag
                                adc_value=read_adc(0);
                                xx[k]=ADCH;
                                }
                    
                       
                       
                          if (n>=15)
                            {
                             cc=(xx[k]*(n-15)+ADCH)/(n-14);
                             xx[k]=cc;
                            }

                    }
                  ROG=0;
               }
             
            putchar1('s');
            delay_ms(100);
              for(k=1; k<2087;k++)
              {
               putchar1(xx[k]);
               delay_ms(10);                   
              }

My main problem is how I can achieve to high level of frequencies? I wanna read ADC 2087 on high level of timer 1...But How? Please help me....I am confused..

 

No idea?