Hello,
I am thinking about a battery management system that has both high voltage cutout and low voltage cutout circuits. planning on using a FET or IGBT for these, which I think is pretty standard. When the battery is just siting idle (charged up, no charge current in and no discharge current out) I would want the LVC and HVC to be OFF, meaning the FETS would be ON. I don't want to drain the battery, so I wonder about having them just sitting there in the on state. The gate capacitor should be charged and hardly leaking any current, and with no current across the drain/source pins, I'm thinking this should be OK, but is this a common/acceptable thing to do? Will I "wear out" the FET buy keeping it in this state for extended periods? Am I forgetting about some power drain that will consume current and discharge my battery?
Thanks!
I am thinking about a battery management system that has both high voltage cutout and low voltage cutout circuits. planning on using a FET or IGBT for these, which I think is pretty standard. When the battery is just siting idle (charged up, no charge current in and no discharge current out) I would want the LVC and HVC to be OFF, meaning the FETS would be ON. I don't want to drain the battery, so I wonder about having them just sitting there in the on state. The gate capacitor should be charged and hardly leaking any current, and with no current across the drain/source pins, I'm thinking this should be OK, but is this a common/acceptable thing to do? Will I "wear out" the FET buy keeping it in this state for extended periods? Am I forgetting about some power drain that will consume current and discharge my battery?
Thanks!