Darlington drivers
- Thread starter wongkenji
- Start date
Here is a short explanation of a Darlington pair configuration that might be helpful. You will need to scroll down to a point near the bottom for the article to get to the description of the darlington pair configuration.
For the most part, a darlington pair is just a way cascading two transistors to achieve a higher current gain than can be had with a single device. One thing affected by this configuration is that the collector-to-emitter voltage of the output transistor, when it is fully saturated, cannot go as low as a single transistor stage.
hgmjr
For the most part, a darlington pair is just a way cascading two transistors to achieve a higher current gain than can be had with a single device. One thing affected by this configuration is that the collector-to-emitter voltage of the output transistor, when it is fully saturated, cannot go as low as a single transistor stage.
hgmjr
Just to be on the safe side, I would recommend you tie pin 9 to your positive voltage supply.
The diodes are there for those application where the part is used to drive an inductive load such as relays. They prevent the flyback voltage associated with such loads from destroying the transistor.
hgmjr
The diodes are there for those application where the part is used to drive an inductive load such as relays. They prevent the flyback voltage associated with such loads from destroying the transistor.
hgmjr
Hmm ok, here's the circuit diagram for the inverter btw: http://kenji.britney.googlepages.com/IMG_2548.jpg
I need to ask another question, since the chip is has an open collector output, what value of the pull-up resistor should I use if I'm connecting it to a 15V supply?
Yes I'm connecting it to J2.
That being the case, the design already has 3K pull-ups (the schematic is a little fuzzy so I am guessing here) to 15V located on the board. With 3K pullups to 15V that would mean that around 4.3 to 4.5 mA will be set up in the opto_isolators located on the board.
The original designer seems to have felt comfortable with that value.
Does that answer your question?
hgmjr
The original designer seems to have felt comfortable with that value.
Does that answer your question?
hgmjr
Erm not really the question I was asking, let me rephrase. I designed this circuit: http://kenji.britney.googlepages.com/delay-schematic01.jpg to be connected to J2 on the previous schematic and was wondering whether the pull-up resistor values I used was correct. Could I reduce them into 1 resistor also? Thanks very much!
I think I have it clear now.
You want to take the output from the circuit in the schematic referenced above to be used to drive the circuit in the earlier schematic. You would be connecting the signals at J3 of your design to the signals on J2 of the older schematic.
In that case, you should be able to get rid of all of the pull-up resistors in your design. The pullups on the older schematic are all the pull-ups you need. Make sure that you connect the grounds between the new design and the older design.
hgmjr
Just so that you are aware of it, the output on J3 of your design will be constantly low when it is not connected to the second board. That is because the second board supplies the pull-up to your board.
You can use a high valued pullup (around 15K or greater) on your board if you want to be able to make sure that the signals are active without the necessity of connecting it up to the second board.
hgmjr
You can use a high valued pullup (around 15K or greater) on your board if you want to be able to make sure that the signals are active without the necessity of connecting it up to the second board.
hgmjr
