I'm still waiting for the OP to post the entire text of the problem. I was skeptical of the problem description from my first post and have asked for the complete text of the problem - twice.

Yeah, I sort of deviated from the available information. I do that sometimes. For example, I could ask "What is the minimum number of flip-flops required to produce the sequence in the OP?" I think I can prove that one. Or, what is the minimum number of flip flops required if the count outputs come directly from the flip-flops? I am not sure about this one and not sure I could prove it. Maybe a separate thread without the restrictions of Homework Help?

 

This is entire text of the problem. Probably there are some wrong specialistic words, but I translated it from Google Translator.


Simulation in Proteus ISIS reversible binary-decimal counter. State of counter signalized by 4 outputs S0, S1, S2, S3. Counter works by program in this table.

	[S3] [S2] [S1] [S0]
0 1 2 3 4	[0] [0] [0] [0] [0] [0] [0] [1] [0] [0] [1] [0] [0] [0] [1] [1] [0] [1] [0] [0]	Binary
1 2 3 4	[0] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [0]	Decimal
4 3 2 1 0	[0] [1] [0] [0] [0] [0] [1] [1] [0] [0] [1] [0] [0] [0] [0] [1] [0] [0] [0] [0]	Binary

When counter is on [0] [0] [0] [0] it goes to [0] [0] [0] [1] and creates an infinite cycle of action. A helpful tip is the information that the counter has 3 operating states.

 

When counter is on [0] [0] [0] [0] it goes to [0] [0] [0] [1] and creates an infinite cycle of action. A helpful tip is the information that the counter has 3 operating states.

When it says "3 operating states" that would usually mean that input switches are used to select the operating state; however, when it says "infinite cycle of action" it means that the counter takes care of switching between operating states by itself. That would imply a secondary counter is needed to track which of 3 operating states the first counter is in for the infinite cycle of action. So what you are really designing is a 6-bit state machine with an infinite cycle of action & no input controls (except maybe a reset button to start the cycle).

 

What is the original language?

 

This is entire text of the problem. Probably there are some wrong specialistic words, but I translated it from Google Translator.


Simulation in Proteus ISIS reversible binary-decimal counter. State of counter signalized by 4 outputs S0, S1, S2, S3. Counter works by program in this table.

	[S3] [S2] [S1] [S0]
0 1 2 3 4	[0] [0] [0] [0] [0] [0] [0] [1] [0] [0] [1] [0] [0] [0] [1] [1] [0] [1] [0] [0]	Binary
1 2 3 4	[0] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [0]	Decimal
4 3 2 1 0	[0] [1] [0] [0] [0] [0] [1] [1] [0] [0] [1] [0] [0] [0] [0] [1] [0] [0] [0] [0]	Binary

When counter is on [0] [0] [0] [0] it goes to [0] [0] [0] [1] and creates an infinite cycle of action. A helpful tip is the information that the counter has 3 operating states.

What is the last column in the table?

I'd interpret reversible to be an up/down counter and binary-decimal to mean counting in binary or decimal (which is meaningless when the count range is 0-4). You show an up and down sequence for "binary", but not for "decimal". Is that relevant information? Does it mean decimal can only count up?

To have the above capabilities, you'd require more inputs.

 

This is entire text of the problem. Probably there are some wrong specialistic words, but I translated it from Google Translator.


Simulation in Proteus ISIS reversible binary-decimal counter. State of counter signalized by 4 outputs S0, S1, S2, S3. Counter works by program in this table.

	[S3] [S2] [S1] [S0]
0 1 2 3 4	[0] [0] [0] [0] [0] [0] [0] [1] [0] [0] [1] [0] [0] [0] [1] [1] [0] [1] [0] [0]	Binary
1 2 3 4	[0] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [1] [0] [0] [0]	Decimal
4 3 2 1 0	[0] [1] [0] [0] [0] [0] [1] [1] [0] [0] [1] [0] [0] [0] [0] [1] [0] [0] [0] [0]	Binary

When counter is on [0] [0] [0] [0] it goes to [0] [0] [0] [1] and creates an infinite cycle of action. A helpful tip is the information that the counter has 3 operating states.

I'd call it 3 operating "modes" to distinguish it from the "state" that the counter is in at any given time.

It's unclear why 0100 is "3" and 1000 is "4" in your Decimal mode as opposed to "4" and "8" (as in your original sequence).

The "hint" seems aimed at leading you towards a machine that automatically tracks and switches modes. That's certainly doable.

The table implies that it is in state 0 for two clock periods, one at the beginning of the sequence and one at the end. That gives you a total of fourteen states in the sequence.

Try breaking the problem into two pieces. In the first piece, just make a counter -- any counter -- that cycles through a sequence of fourteen states -- any fourteen states -- and repeats. Get that far and we can proceed from there.