Yes, as you can see on the diagram T2 work as source follower.So you are saying the signal from the uC PWM is converted to a much higher voltage close to the collector voltage and this drives the gate?
But we use C1 bootstrap capacitor to provide a voltage needed to drive T2 (to full open T2).
If input voltage is equal to 5V the T1 is in saturation. And C1 capacitors star charging phase. And end the charging phase when voltage across C1 reach
V_C1 = Vcc - Vd = 20V - 0.7V = 19.3V
And now if we have a low input signal (0V). T1 is in cut-off. But T2 starts to conduct. So voltage at T2 source start to increase. This causes that the voltage at D1 cathode also increase thanks to C1 voltage. So this causes that the voltage at T2 source and the load increase even faster.
And voltage stop increase when T2 is full ON. (When T2 source voltage reach almost Vcc value).
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