You want the output impedance of any driving circuit to be lower than that of the load.
A general rule of thumb is to make the output impedance of the driver to be ten times lower than that of the load.
For example, if you need to drive a 50-ohm load, the output impedance should be 5-ohm or lower.

An exception is if you are driving high frequency signals into a 50-ohm coax cable. In this case, you would add a 50-ohm resistor in series with the output in order to absorb reflections coming back on the transmission line (besides having 50-ohm effective load at the receiving end).

Alright, but if i used my actual design+ a second stage used as buffer, that would be fine? the calculations i made are right? Besides the 50 Ohm thing?

 

You want the output impedance of any driving circuit to be lower than that of the load.
A general rule of thumb is to make the output impedance of the driver to be ten times lower than that of the load.
For example, if you need to drive a 50-ohm load, the output impedance should be 5-ohm or lower.

An exception is if you are driving high frequency signals into a 50-ohm coax cable. In this case, you would add a 50-ohm resistor in series with the output in order to absorb reflections coming back on the transmission line (besides having 50-ohm effective load at the receiving end).

So usually i need to have a lower RC value, like in this case, otherwise i could use a second buffer stage no?

 

Hi EN0,
When you design a project, you first have to define the specification or the required performance.
Just tacking bits together will not help you to learn and understand electronics.

Did you work through that tutorial link I posted?

If Yes, now look for information on Emitter Follower circuits.
E

https://www.electronics-notes.com/a...nsistor-common-collector-emitter-follower.php

 

Hi EN0,
When you design a project, you first have to define the specification or the required performance.
Just tacking bits together will not help you to learn and understand electronics.

Did you work through that tutorial link I posted?

If Yes, now look for information on Emitter Follower circuits.
E

https://www.electronics-notes.com/a...nsistor-common-collector-emitter-follower.php

Yeah, i was following the tip that the other guy gave me, i think i did good choices beside that 50 Ohm requirement

 

Hi EN0,
When you design a project, you first have to define the specification or the required performance.
Just tacking bits together will not help you to learn and understand electronics.

Did you work through that tutorial link I posted?

If Yes, now look for information on Emitter Follower circuits.
E

https://www.electronics-notes.com/a...nsistor-common-collector-emitter-follower.php

I will look into this now, thanks

 

Hi EN0,
When you design a project, you first have to define the specification or the required performance.
Just tacking bits together will not help you to learn and understand electronics.

Did you work through that tutorial link I posted?

If Yes, now look for information on Emitter Follower circuits.
E

https://www.electronics-notes.com/a...nsistor-common-collector-emitter-follower.php

ok i have seen this topic, so u suggest me to complete my design by adding this second stage with the buffer?

 

Hey i tried to look into It again
I chose basically everything ( beside the 50 Ohm load issue, i have no idea what this really means )

I'm just getting to my computer for today and I see that there are several other responses, which will likely make most of this redundant.

In general, your design starts with the interface to the rest of the world -- where the input signals are coming from and where the output signals go. For an amplifier especially, the load that the output sees is one of the most important things that must be taken into account. But, I have a feeling that you are already discovering this, but I'll mention them as we go along.

First of all , i chose IC to be 2mA, and VC to he at VCC/2, in order to have maximum swing

Why 2 mA? Did you have a particular reason for that, or was it just pulled out of a hat as a seemingly convenient number? The former is better, but sometimes we have to start with the latter because we have to start somewhere.

This is where the load starts coming into play. The specs called for a max output amplitude of 4 V across a 50 Ω load, which means that the peak current will be 80 mA. You are designing a Class A amplifier, so you need to have the transistor conducting current at all times, which means that it has to be at least 80 mA to function. Ideally, in terms of signal distortion, you would like the peak output current to be a small fraction of the quiescent current so that the transistor operates essentially around a small region about it's DC operating point. A common rule of thumb, which is often not achievable in practice, is a factor of ten, so your quiescent current would be more like 800 mA, not 2 mA.

That's a lot of current and it means that your amplifier is going to be dissipating about 10 W of power even when sitting there looking stupid -- and gives you an indication of why we don't like Class A power amplifiers, despite their advantages in terms of linearity. It also foreshadows why we like to break the functionality of an amplifier into stages, each with a different purpose, so that we can have a Class A gain stage that operates at low power, and a different type of output stage that is better adapted to delivering high power but at low gain (often even at a slight attenuation). But, for now, we'll see how well we can get a single stage amplifier to do it all -- and the answer might be that it doesn't do it well. If so, that's fine. That's how we learn.

That 800 mA is close to (or even above, depending on whose data sheet you look at) the max continuous current for the 2N2222. We don't like running parts near their max rated parameters if we can avoid it. When dealing with power-related parameters, we like at least a factor of two. So let's initially shoot for 400 mA of quiescent current. It won't be surprising if this high quiescent current causes other problems.

So i calculated RC to be 3kOhm, so VC will be 6 volt, afterwards i chose RE to be 500 Ohm RE=500 Ohm in this way i got a drop on RE of 1V ( thats usually the voltage i need as VE, 10% of VCC ).

Let's see what the numbers look like for Icq = 400 mA.

While shooting for a quiescent output voltage of 6 V is a nice starting point, what I really want to do is put if halfway between my min and max voltage output range, which will probably mean I want it a bit higher than this due to the drop across the transistor and emitter circuit. But we can start with 6 V and adjust later, if warranted.

To drop 6 V at 400 mA, I need Rc to be just 15 Ω. To get 1 V across Re, we need it to be 2.5 Ω, which I'll tweak to 2.4 Ω to use a standard value.

re'=25mV/ie=25mV/2mA=12.5Ohm

So at this point to have a gain of 20 , AV= 20 in AC, at 1KHz, i calculated that the capacitor in parallel to the emitter resistor has to be around 0.9uF.
So the impedance XC Is= =1/2πfc=1/2π•1000•0.9•10-⁶=177 Ohm
at 1 KHz i will have the parallel , which Is RE(AC)=500•177/500+177=130.7Ohm

So AV will be AV=RC/Retot=3000/130.7+12.5=-20.95 ( which Is acceptable.

The problem here is that your gain will only be near the target at that one frequency. While I didn't mention it specifically, I hinted that this amplifier spec was related to the audio range. I should have stated that we would like the gain to be reasonably constant over this range (i.e., 20 Hz to 20 kHz, not counting the attenuation do to our filters at those edges). I actually wasn't expecting you to try to adjust the DC and AC gains separately via bypassing the emitter resistor, so I didn't think to mention that. So you are ahead of the game in that regard. You might find it interesting to see what your expected gain would be at 100 Hz and at 10 kHz.

For a gain of 20, with an Rc of 15 Ω, we need the total emitter resistance to be 750 mΩ. The small-signal resistance is about 26 mV divided by 400 mA, or 65 mΩ, meaning that we need to keep about 700 mΩ resistance externally. At the low end of the frequency range, 20 Hz, to get that we would need a capacitance of 11 mF, which is huge. We'll call it 10 mF, again for the sake of using standard values. For now, we'll assume we can find such a critter.

But even this has the same problem -- the gain will vary with frequency. For now, we'll live with it. If we really intended to stick with this design, we would need to address this. One way is to use the cap to completely eliminate the Rc by having it's reactance be well below our needed resistance and then put a resistor of the desired resistance between it and the transistor's emitter.

To couple the output to the load, we want to use a coupling capacitor to block the DC component. Since we want our lower cutoff to be at about 20 Hz, that means this capacitor needs to be 159 uF, which we'll call 150 uF (though going the other way probably makes more sense in order to lower the cutoff frequency rather than let it intrude into our desired passband).

At this point i calculated R1 and R2, i need to have VB around 1.7V, so also by respecting the rule of thumb of having the divider current>=10x base current, i chose R1 to be 10.3kOhm and R2=1.7kOhm.

Even at the 400 mA that I chose, beta is not going to be the 100+ that we like to assume, but rather probably closer to half that, perhaps even a bit less. For convenience sake, let's assume 40, making my base current about 10 mA. Ideally, that means I want the bias network current to be around 100 mA (which is another 1.2 W of power being dissipated, which further underscores why we like our gain stages to be low power).

For 100 mA, I need a total resistance of 120 Ω. To get 1.7 V (I might need a bit more at that high a base current, perhaps closer to 2 V, but we'll start with 1.7 V) I need the lower resistor, which I call Rbe (the bias resistor on the emitter side) to be 17 Ω and the upper resistor, Rbc, to be 103 Ω. For the sake of using standard resistor values, we'll use 18 Ω and 100 Ω, respectively.

Then i chose the input capacitor in order to have a high pass filter at 20Hz
High pass filter at input

fc=1/2π•Rin•Cin=1/2π•20•670=11.9uF


Thats what i made for now, what do u think i did wrong in this design? and why? ( I kinda think that the 50 Ohm thing will make me reconsider the entire design, but its fine for now )

For my bias network, which has an impedance of a little under 18 Ω, I need a capacitor of about 150 µF.

So here is the circuit we ended up with:



Now let's see if this comes close to giving us the 4 V amplitude sine wave at the output that we are hoping for.



That's actually pretty close. The amplitude is probably about as close as you can get to idea given the tweaking that was done to use standard values. You can see that there appears to be some distortion since the upper peaks are not as sharp as the bottom peaks, but it's pretty descent (I don't know if it would be descent enough for a good audio system, since audio isn't my thing).

A few points worth noting. The only component value that is totally out in left field is that 10 mF cap across the emitter resistor. But the power dissipation is very high at about 5.4 W of quiescent power, especially when you consider that it is delivering only about 160 mW to the load. But very poor power efficiency is one of the prices paid for using a Class A amplifier to deliver power to a load. Another thing to consider is that the input impedance seen by our signal source is only something like 25 Ω, so it has to be capable of delivering power as well, though not nearly as much since its amplitude is much less. Still, this somewhat defeats the purpose of having an amplifier. At RF frequencies, this is something we often just have to accept, but at lower frequencies, we want amplifiers to have very high input impedances and very low output impedances.

 

With all due respect, I think it was you that decided that the amplifier should be designed for a 50 ohm load. The TS just wanted to design a basic amplifier stage, originally with the 424 ohm collector resistor as his "Load", as the complete article. Maybe it should be considered as driving into a following higher impedance stage?

 

COMMON EMITTER AMPLIFIER with Av = 2

 

With all due respect, I think it was you that decided that the amplifier should be designed for a 50 ohm load. The TS just wanted to design a basic amplifier stage, originally with the 424 ohm collector resistor as his "Load", as the complete article. Maybe it should be considered as driving into a following higher impedance stage?

I didn't decide that HIS amplifier should be designed for a 50 Ω load, I offered a set of specifications that he might consider designing to, which he accepted and attempted. Note that his original design also had a 1 Hz signal and a gain of 2, whereas the example specs I offered had a 1 kHz signal and a gain of 20. He made a very reasonable stab at it, and I think learned a fair amount in the process. I then simply walked through a parallel process showing how the 50 Ω load could be accommodated.

 

See

 

I'm just getting to my computer for today and I see that there are several other responses, which will likely make most of this redundant.

In general, your design starts with the interface to the rest of the world -- where the input signals are coming from and where the output signals go. For an amplifier especially, the load that the output sees is one of the most important things that must be taken into account. But, I have a feeling that you are already discovering this, but I'll mention them as we go along.



Why 2 mA? Did you have a particular reason for that, or was it just pulled out of a hat as a seemingly convenient number? The former is better, but sometimes we have to start with the latter because we have to start somewhere.

This is where the load starts coming into play. The specs called for a max output amplitude of 4 V across a 50 Ω load, which means that the peak current will be 80 mA. You are designing a Class A amplifier, so you need to have the transistor conducting current at all times, which means that it has to be at least 80 mA to function. Ideally, in terms of signal distortion, you would like the peak output current to be a small fraction of the quiescent current so that the transistor operates essentially around a small region about it's DC operating point. A common rule of thumb, which is often not achievable in practice, is a factor of ten, so your quiescent current would be more like 800 mA, not 2 mA.

That's a lot of current and it means that your amplifier is going to be dissipating about 10 W of power even when sitting there looking stupid -- and gives you an indication of why we don't like Class A power amplifiers, despite their advantages in terms of linearity. It also foreshadows why we like to break the functionality of an amplifier into stages, each with a different purpose, so that we can have a Class A gain stage that operates at low power, and a different type of output stage that is better adapted to delivering high power but at low gain (often even at a slight attenuation). But, for now, we'll see how well we can get a single stage amplifier to do it all -- and the answer might be that it doesn't do it well. If so, that's fine. That's how we learn.

That 800 mA is close to (or even above, depending on whose data sheet you look at) the max continuous current for the 2N2222. We don't like running parts near their max rated parameters if we can avoid it. When dealing with power-related parameters, we like at least a factor of two. So let's initially shoot for 400 mA of quiescent current. It won't be surprising if this high quiescent current causes other problems.



Let's see what the numbers look like for Icq = 400 mA.

While shooting for a quiescent output voltage of 6 V is a nice starting point, what I really want to do is put if halfway between my min and max voltage output range, which will probably mean I want it a bit higher than this due to the drop across the transistor and emitter circuit. But we can start with 6 V and adjust later, if warranted.

To drop 6 V at 400 mA, I need Rc to be just 15 Ω. To get 1 V across Re, we need it to be 2.5 Ω, which I'll tweak to 2.4 Ω to use a standard value.


The problem here is that your gain will only be near the target at that one frequency. While I didn't mention it specifically, I hinted that this amplifier spec was related to the audio range. I should have stated that we would like the gain to be reasonably constant over this range (i.e., 20 Hz to 20 kHz, not counting the attenuation do to our filters at those edges). I actually wasn't expecting you to try to adjust the DC and AC gains separately via bypassing the emitter resistor, so I didn't think to mention that. So you are ahead of the game in that regard. You might find it interesting to see what your expected gain would be at 100 Hz and at 10 kHz.

For a gain of 20, with an Rc of 15 Ω, we need the total emitter resistance to be 750 mΩ. The small-signal resistance is about 26 mV divided by 400 mA, or 65 mΩ, meaning that we need to keep about 700 mΩ resistance externally. At the low end of the frequency range, 20 Hz, to get that we would need a capacitance of 11 mF, which is huge. We'll call it 10 mF, again for the sake of using standard values. For now, we'll assume we can find such a critter.

But even this has the same problem -- the gain will vary with frequency. For now, we'll live with it. If we really intended to stick with this design, we would need to address this. One way is to use the cap to completely eliminate the Rc by having it's reactance be well below our needed resistance and then put a resistor of the desired resistance between it and the transistor's emitter.

To couple the output to the load, we want to use a coupling capacitor to block the DC component. Since we want our lower cutoff to be at about 20 Hz, that means this capacitor needs to be 159 uF, which we'll call 150 uF (though going the other way probably makes more sense in order to lower the cutoff frequency rather than let it intrude into our desired passband).



Even at the 400 mA that I chose, beta is not going to be the 100+ that we like to assume, but rather probably closer to half that, perhaps even a bit less. For convenience sake, let's assume 40, making my base current about 10 mA. Ideally, that means I want the bias network current to be around 100 mA (which is another 1.2 W of power being dissipated, which further underscores why we like our gain stages to be low power).

For 100 mA, I need a total resistance of 120 Ω. To get 1.7 V (I might need a bit more at that high a base current, perhaps closer to 2 V, but we'll start with 1.7 V) I need the lower resistor, which I call Rbe (the bias resistor on the emitter side) to be 17 Ω and the upper resistor, Rbc, to be 103 Ω. For the sake of using standard resistor values, we'll use 18 Ω and 100 Ω, respectively.



For my bias network, which has an impedance of a little under 18 Ω, I need a capacitor of about 150 µF.

So here is the circuit we ended up with:

View attachment 358115

Now let's see if this comes close to giving us the 4 V amplitude sine wave at the output that we are hoping for.

View attachment 358116

That's actually pretty close. The amplitude is probably about as close as you can get to idea given the tweaking that was done to use standard values. You can see that there appears to be some distortion since the upper peaks are not as sharp as the bottom peaks, but it's pretty descent (I don't know if it would be descent enough for a good audio system, since audio isn't my thing).

A few points worth noting. The only component value that is totally out in left field is that 10 mF cap across the emitter resistor. But the power dissipation is very high at about 5.4 W of quiescent power, especially when you consider that it is delivering only about 160 mW to the load. But very poor power efficiency is one of the prices paid for using a Class A amplifier to deliver power to a load. Another thing to consider is that the input impedance seen by our signal source is only something like 25 Ω, so it has to be capable of delivering power as well, though not nearly as much since its amplitude is much less. Still, this somewhat defeats the purpose of having an amplifier. At RF frequencies, this is something we often just have to accept, but at lower frequencies, we want amplifiers to have very high input impedances and very low output impedances.

Hello,

Sorry for late response, i was a bit sick but now im back.

Ok so i have gotta choose a pretty high quiescent current, otherwise in the curve of the transistor i would be instantly in saturation region. But by choosing a high quiescent current i gotta dissipate more even when there Is no signal in input, so as u taught me class A amplifiers got this "disadvantage" so if i understood well, for now our "aim" , the result we wanna achieve is just a stage that for 20 as gain ( even if its not ideal to deliver much current tò the load) then the next stage will be made tò supply more current to the load ( So i suppose that what i gotta do Is finding something middleway? Since i know i will make a next stage that will do the job of delivering current tò the load ). Talking about the gain (hfe) yeah i know that at higher currents the gain hfe Is lower ( i saw IC vs hfe curve ), u want the bias network at around 100mA cus thats another rule of thumb right?, i read that usually ibiasnetwork Is = X10 IBase current. I think i got everything about what u said, many concepts i had them in my mind we can say, so with that done, what i could try to do now? Tò keep learning? Building something with 2 stages or so?

I think i gotta understood the logic, u used the rules i read about them many times and thanks a lot for ur answer, very detailed and simple to understand even for a newbie like me!

 

With all due respect, I think it was you that decided that the amplifier should be designed for a 50 ohm load. The TS just wanted to design a basic amplifier stage, originally with the 424 ohm collector resistor as his "Load", as the complete article. Maybe it should be considered as driving into a following higher impedance stage?

no worries, he trying to teach me things well, every response Is appreciated!

 

I didn't decide that HIS amplifier should be designed for a 50 Ω load, I offered a set of specifications that he might consider designing to, which he accepted and attempted. Note that his original design also had a 1 Hz signal and a gain of 2, whereas the example specs I offered had a 1 kHz signal and a gain of 20. He made a very reasonable stab at it, and I think learned a fair amount in the process. I then simply walked through a parallel process showing how the 50 Ω load could be accommodated.

Yeah no worries, thanks a lot!

 

Hi EN0,
Did you figure out that using a Emitter follower, aka Common Collector is the way to go for a low impedance load?
E

 

Talking about the gain (hfe) yeah i know that at higher currents the gain hfe Is lower ( i saw IC vs hfe curve ), u want the bias network at around 100mA cus thats another rule of thumb right?, i read that usually ibiasnetwork Is = X10 IBase current. I think i got everything about what u said, many concepts i had them in my mind we can say, so with that done, what i could try to do now? Tò keep learning? Building something with 2 stages or so?

In order to support a better understanding of the transistors working principle a like to mention the fact that at a higher collector current the transconductance - and with it - the VOLTAGE Gain of the stage will be HIGHER!
So - it does really not matter much if the so called "current gain" (hfe) will be somewhat lower or higher. This will affect the input current and the input resistance only and will not have any influence on voltage gain!
You should always keep in mind that the BJT is a voltage-controlled device Ic=f(Vbe)

 

Hi EN0,
Did you figure out that using a Emitter follower, aka Common Collector is the way to go for a low impedance load?
E

Hey, yeah i saw it! Kinda simple, its about all about choosing RE resistor

 

Hey, yeah i saw it! Kinda simple, its about all about choosing RE resistor

Two things you need to know about Common Collector configuration:

1) Voltage gain = 1
2) Output is non-inverting

 

Two things you need to know about Common Collector configuration:

1) Voltage gain = 1
2) Output is non-inverting

Yeah i saw that really basically thats what i got
Voltage gain Is 1 ( only little drop of the diode )
2) output Is non inverting since its take at the emitter
3) low impedance output
4) high current gain
5) usually u can put this stage in cascade to like a common emitter amplifier, so u got a voltage gain circuit then this tò drive a load that requires high current