I am stuck on a question where I need to find the upper frequeny limit due to Ccb of the transistor which is given as 100p.

It is a voltage divider configuartion and the question asks for the limit with and without load. I just have no idea how to do this and cant find any help in my notes. I would really appreciate some help with this.

f) Find the upper frequency limit due to Ccb,
g) Now disconnect RL and repeat d) and f)

I am also unsure if I calculated the low frequency limit imposed by C2 correctly, I used the equation 1/[2(pi)fC2]=RL, resulting in 1.6Hz. I am unsure if Rc needs to be added in series with RL or not. I found conflicting notes on the web.

 

I am stuck on a question where I need to find the upper frequeny limit due to Ccb of the transistor which is given as 100p.

It is a voltage divider configuartion and the question asks for the limit with and without load. I just have no idea how to do this and cant find any help in my notes. I would really appreciate some help with this.

Find your Miller equivalent with:
Cout(Miller) = Cbc(Av + 1/ Av)

then your critical frequency can be found with:
fc = 1/ 2 pi Rc Cout(Miller) where Rc is the collector resistor parallel with the load resistor.

Hope you can make this out; the small letters are subscripts

I am unsure if Rc needs to be added in series with RL or not. I found conflicting notes on the web.

Because Vcc is AC ground, you need to put the collector resistor in parallel with your load. That subscript should be a capital C, as the lower case c as a subscript means collector resistor in parallel with load resistor. Make sense?

 

Yes thanks very much, I can now find the high frequency limit. I am still a little confused about finding the low frequency limit from the output coupling capacitor as

The output coupling capacitor forms a second high-pass filter with the series combination of RC and the load resistance. Note that RC and the load resistor are treated in parallel for the gain calculation, but in series for this calculation.

from http://archive.chipcenter.com/circuitcellar/september01/c0901ts7.htm

and the example from this page, http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/npncecoup.html#c1, which just uses RL.

So now I have three options and I don't know what to trust .

 

Yes, it can be a bit confusing. What they mean is not that the resistors are considered in series with each other, but in series with the cap. It is a high pass filter.
Vcc is still considered as an AC ground, so the collector resistor is in parallel with the load. Just as with the input capacitance, which is working in series with the parallel resistance of both base bias resistors, and the emitter resistance seen through the base. You should have three critical frequencies on the low end, and they will each roll off at -20 dB per decade.

 

I think I get it now, thank you so much for your help.