Clipping on CE ampflifier

jclfc

Joined Oct 21, 2022
9
Hi

I'm trying to understand the positive half clipping that occurs when I change the input signal from 1mV to 100mV. I've read up on distortion from https://www.electronics-tutorials.ws/amplifier/amp_4.html but it doesn't seem to suggest my problem (unless my ignorance is shining through).

Below is the 1mV simulation followed by the 100mV.

ericgibbs

Joined Jan 29, 2010
18,236
hi jc,
Welcome to AAC.
E

jclfc

Joined Oct 21, 2022
9
hi jc,
Welcome to AAC.
E

Thanks Eric. I've attached the asc file

Attachments

• 1.9 KB Views: 5

ericgibbs

Joined Jan 29, 2010
18,236
hi jc,
E
This is what an AC analysis shows, a very poor response.
Edit:
You should not try to drive an 8R load with that amplifier.

Ian0

Joined Aug 7, 2020
8,947
You need to use a sensible load resistance, at least ten times the output impedance of the amplifier.
The output resistance is of the order of 1300Ω, so perhaps if you change the load resistance to 13k you might get somewhere.

jclfc

Joined Oct 21, 2022
9
You need to use a sensible load resistance, at least ten times the output impedance of the amplifier.
The output resistance is of the order of 1300Ω, so perhaps if you change the load resistance to 13k you might get somewhere.
Thanks for reviewing. If you look at my workings that I have posted it shows I have been given some set parameters - including the load resistance (and capacitors which is not showing on my workings) - and I have calculated all other remaining ones needed to construct the CE amp. The calculated and simulation results using 1mV input are very close which seems to suggest my workings are correct. We have been advised to raise the input to 100mV to show distortion and explain why it happens. I'm struggling to see why it works as designed at 1mV and not at 100mV

Ian0

Joined Aug 7, 2020
8,947
Should this thread be in homework help?

. . .but you need to examine what limits the maximum output of the amplifier, and if you try some other values for the load resistance you will see.

jclfc

Joined Oct 21, 2022
9
hi jc,
E
This is what an AC analysis shows, a very poor response.
Edit:
You should not try to drive an 8R load with that amplifier.

View attachment 279003
Thanks for reviewing. The resistor load has been set by the lecturer. My workings seem to suggest the system works as designed at 1mV but not at 100mV input. I appreciate the load resistance isn't what this type of design will work best with, I think I tackle that latter on. But I have been asked to explain
Should this thread be in homework help?

. . .but you need to examine what limits the maximum output of the amplifier, and if you try some other values for the load resistance you will see.

ericgibbs

Joined Jan 29, 2010
18,236
hi jc,
I would suggest you calculate the output impedance of the Collector and the impedance of the 8R load.
E

BTW: a hint, when you use AC analysis set AC at 1v not 0.1v.
Using a 1v AC gives direct 'db' readings on your LTS plots.

jclfc

Joined Oct 21, 2022
9
hi jc,
I would suggest you calculate the output impedance of the Collector and the impedance of the 8R load.
E
Thanks E

ericgibbs

Joined Jan 29, 2010
18,236
Hi,
As you know, we can only give hints and guidance for Homework questions.

E

MrChips

Joined Oct 2, 2009
29,853
I will repeat what has already been stated in posts #5 and #6 in order to drive home a point.
You have an impedance mismatch.

Ideally, the driver impedance should be lower than that of the load, 10 times lower.
If the driver impedance is 1300Ω then it would be capable of driving a 13000Ω load.

If your load has to be 8Ω then the driver impedance should be less than 1Ω,
You have the wrong circuit to achieve this.

jclfc

Joined Oct 21, 2022
9
I will repeat what has already been stated in posts #5 and #6 in order to drive home a point.
You have an impedance mismatch.

Ideally, the driver impedance should be lower than that of the load, 10 times lower.
If the driver impedance is 1300Ω then it would be capable of driving a 13000Ω load.

If your load has to be 8Ω then the driver impedance should be less than 1Ω,
You have the wrong circuit to achieve this.
[
.

Thanks for reviewing. I get the point that's been driven home!

jclfc

Joined Oct 21, 2022
9
Hi,
As you know, we can only give hints and guidance for Homework questions.

E
It's a URL link earlier in post 4 but I understand what the issue is now. Appreciate the guidance

ericgibbs

Joined Jan 29, 2010
18,236
hi jc,
You can use LTS to plot the Input and Output impedance values.
E

Edit: @jclfc
I have seen your calc's OK, so now that you have calculated Zout, this is what LTS shows.
E

Last edited:

crutschow

Joined Mar 14, 2008
33,363
I'm struggling to see why it works as designed at 1mV and not at 100mV
Basically the output can drive only some much current into the load, so 1mV is ok, but 100mV saturates the output drive since it can't deliver the needed current.
The positive output current is provided by RC, so how large a voltage can be generated at the output load by this value of RC?

Ian0

Joined Aug 7, 2020
8,947
Work out how much current you need through the 8Ω resistor to get the output voltage you want.
Then you need to realise that, on the positive half cycle, ALL that current has to come through your 1.3k resistor.

WBahn

Joined Mar 31, 2012
29,519
Hi

I'm trying to understand the positive half clipping that occurs when I change the input signal from 1mV to 100mV. I've read up on distortion from https://www.electronics-tutorials.ws/amplifier/amp_4.html but it doesn't seem to suggest my problem (unless my ignorance is shining through).

Below is the 1mV simulation followed by the 100mV.

View attachment 278999

View attachment 278998
Let's assume, for the moment, that your capacitors are all sized to place a 100 kHz signal in the passband (I'm pretty suspicious of this, but we'll assume that for now).

That means that your bias voltage across the emitter resistor is about 2V and your voltage drop across the collector resistor is about 4 V. If the CE capacitor is doing its job, that means you small-signal gain is about 4 V / 26 mV or about 160.

That means that any signal into the base more than 4 V / 160 = 40 mV is going to require that the transistor go into cutoff.

The output has a cutoff frequency dominated by the 8 Ω resistor, so that's about 200 kHz, which means you are operating well outside the pass band.

Look at your collector voltage and see how close to 12 V it is getting.

Now let's consider those cutoff frequencies.

You emitter bias current is going to be about 3 mA, which makes re about 9 Ω, which makes the small signal input resistance about 900 Ω. That will dominate the resistance seen by the input. Combined with a 0.1 uF cap, the cutoff frequency is aout 2 kHz, so that's okay.

The emitter bypass cap has a cutoff of around 25 Hz, so that's good.

The input capacitor is going to see something around

WBahn

Joined Mar 31, 2012
29,519
Everyone seems to be laser focused on the load impedance. While this explains why he is getting no gain out of the circuit, it does not explain the clipping that he is seeing.

It's my belief that if you remove the load entirely you will still see the clipping because it is due to the amplifier being overdriven by a 100 mV input signal.

Also, a signal of 100 mV is considerably larger than the thermal voltage, which you should stay below if you want the small-signal model to remain reasonably linear.