CD4013 circuit flips but doesn't flop

eetech00

Joined Jun 8, 2013
4,707
True.
My circuit is post #56 is also simple, requiring only 3 passive parts plus one of the two FFs in the CD4013 package, and thus doesn't necessarily need another gate package.
So here's my take on using 1/2 of the CD4013 IC as a simple debounce circuit with fast rise/fall output times to clock the toggle FF:
R2C2 provides a delay so that bounce on both the closing and opening of the PB switch (blue trace) is suppressed.
The circuit uses the CD4013 characteristic that when both PRE and CLR are high the Q output is high.

View attachment 330379

If U1A reset is tied to VDD, then U1A will never "set", So I guess I don't understand how this can work(?).
 

crutschow

Joined Mar 14, 2008
38,532
If U1A reset is tied to VDD, then U1A will never "set", So I guess I don't understand how this can work(?).
It will set.
As I noted in my post, it depends upon a quirk in the CD4013's logic where both outputs go high when both SET and RESET are high (below).
Thus the Q output will go high and low with the SET input, if the RESET input is held high.

1724969307639.png
 

eetech00

Joined Jun 8, 2013
4,707
It will set.
As I noted in my post, it depends upon a quirk in the CD4013's logic where both outputs go high when both SET and RESET are high (below).
Thus the Q output will go high and low with the SET input, if the RESET input is held high.

View attachment 330470
So...I tested this at 5v and 9v and it missed button presses sometimes (didn't toggle/not reliable).
I tested this circuit the same way I tested mine.
 

MisterBill2

Joined Jan 23, 2018
27,602
I do notice that in addition to the other changes, that the 220 K resistors are now all 10K resistors. It could be useful to try that simple change in the original circuit from post #1.
 

crutschow

Joined Mar 14, 2008
38,532
retained the same state.
I meant the Q output of the FF used for debounce.
Is it oscillating during the transition?
If so, a small amount of hysteresis added from the Q output, to the PRE input should eliminate that.
It can't remain in the same state unless it violates its truth-table.
 
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eetech00

Joined Jun 8, 2013
4,707
I meant the Q output of the FF used for debounce.
Is it oscillating during the transition?
If so, a small amount of hysteresis added from the Q output, to the SET input should eliminate that.
It can't remain in the same state unless it violates its truth-table.
I didn't check with a scope.
I'm wondering if the dynamic specs have something to do with this. That is, internal rise time/prop delays are not exactly the same for both S/R inputs.

What do you propose for hysteresis?
 
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