I dont have fixed vref. Where exactly I can get vref? Can I get fixed vref from resistor plus zener diode in series? Would that not create same problem as when load is connected the current is drawn away from zener diode this alot of fluctuation for voltage?

You can do Vref from zener.
The problem doesn’t occure because now you draw only few uA from zener refference, not an all power.
Like example current thru zener is 5mA and the left bjt draws 10uA. That’s negligible.

 

By controlling the Vref you control the Vout.
Vcc 3-12V.
View attachment 324239

That's a three-stage amplifier. Without dominant pole compensation it will oscillate, especially with a capacitive load.
The MOSFET can be driven from the collector of the input transistor to make it a two-stage amplifier which is much more likely to be stable.

 

Ok so then current thru R5 would be 0.7/1.5 = 0.467A.
If what you say concentrate on where power goes then it would go thru Q2? If it does then 0.467A is collector thru Q2? Then base of Q2 would see 0.467/40=0.011A?

How does your calculated current through R5 compare with the output current?

 

You seem preoccupied with beta. It isn't a fixed number. It changes with current, collector-emitter voltage, and temperature.

But there is a minimum value, which has to be allowed for.

 

That's a three-stage amplifier. Without dominant pole compensation it will oscillate, especially with a capacitive load.
The MOSFET can be driven from the collector of the input transistor to make it a two-stage amplifier which is much more likely to be stable.

You can’t drive mosfet from collector of most left transistor because it doesn’t pull the gate low enough at 3V Vcc. OP wants to drive 7A load.

Regarding stability the gate has so much capacity that together with 1k gate resistor the system should be stable. Also a 1k gate resistor can be increased to 10k if a problem appeares. I put 100u at output that helps also (can be increased to 1mF).

 

OP wants to drive 7A load.

The OP doesn't know what he wants (or needs). He has 2 or 3 threads on this, or related, topics and still hasn't been able to articulate requirements. He can't seem to comprehend what dropout voltage is and can't analyze or simulate the circuit suggestions he's been given.

 

You can’t drive mosfet from collector of most left transistor because it doesn’t pull the gate low enough at 3V Vcc. OP wants to drive 7A load.

Regarding stability the gate has so much capacity that together with 1k gate resistor the system should be stable. Also a 1k gate resistor can be increased to 10k if a problem appeares. I put 100u at output that helps also (can be increased to 1mF).

Correct this is what i wanted thanks Michael your very helpful as always

 

You can’t drive mosfet from collector of most left transistor because it doesn’t pull the gate low enough at 3V Vcc. OP wants to drive 7A load.

True, but there aren’t many p-channel MOSFETs that would work with 3V Vgs.

Regarding stability the gate has so much capacity that together with 1k gate resistor the system should be stable. Also a 10n cap can be added parallel to G-S. I put 100u at output that helps also (can be increased to 1mF).

If you add delays to a circuit inside a feedback loop, it is going to compromise its gain margin and phase margin. If you do so in two different places, you can easily make a 180° phase shift. It needs one dominant pole to ensure that the gain reaches unity at a frequency below the point where the phase shift reaches 180°. The g-s capacitance of a common-source MOSFET is often the worst offender for making a circuit go unstable.

 

How does your calculated current through R5 compare with the output current?

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The P-ch works in linear region. Once the Vout/2 (given by two 1k-s on output) is more than Vref the 2n3906 opens and starts closing the P-ch, i.e. it keeps the output regulated.
On other hand the same, if Vout/2 is less than Vref the 2n3906 closes and lets open the P-ch, also keeps output regulated.

So the formula Vout vs. Vref is:

Vout = 2 * Vref

The pair of two 2n3904 -s is a comparator.

The 6v8 zener only protects the gate agains overvoltage since this P-ch has 8V Vgs allowed only.

The P-ch has to be mounted on heatsink.

How to find vb, be, bc of transistors 2 and 3 diagram below assuming Vcc =5V and Vref =1.5V?

 

How to find vb, be, bc of transistors 2 and 3 diagram below assuming Vcc =5V and Vref =3V?

You won’t get anywhere with those assumptions. As @Michal Podmanický says, the circuit has a gain of two. With Vref at 3V and a 5V supply you can never get Vout=6V, so your analysis will fail.

 

You won’t get anywhere with those assumptions. As @Michal Podmanický says, the circuit has a gain of two. With Vref at 3V and a 5V supply you can never get Vout=6V, so your analysis will fail.

Oh then let vref =1.5V

 

If Vref is 1.5V then Vout is 3V, the 1k-s output divider holds base of T2 at 1.5V also (measured between T2 base and Gnd). The all circuit is set to have a very huge gain (almost like op-amp).
So collector of T2 will be at about 4.3V (in case Vcc=5V)(0.7V across T2’s Rc) just enough to little open the T3 and hold the mosfet somewhere in linear region according its Vth and Load.

Btw, this T1,T2 comparator is able to work with Vref >1V only because of T1,T2 Vbe and some voltage across 100ohm is also necessary.
If Vref <1V is needed you need a different comparator.

 

If Vref is 1.5V then Vout is 3V, the 1k-s output divider holds base of T2 at 1.5V also (measured between T2 base and Gnd). The all circuit is set to have a very huge gain (almost like op-amp).
So collector of T2 will be at about 4.3V (in case Vcc=5V)(0.7V across T2’s Rc) just enough to little open the T3 and hold the mosfet somewhere in linear region according its Vth and Load.

Btw, this T1,T2 comparator is able to work with Vref >1V only because of T1,T2 Vbe and some voltage across 100ohm is also necessary.
If Vref <1V is needed you need a different comparator.

How did you figure that T2 collector is at 4.3V? Where is that 0.7V drop from vcc=5V coming from?
Also how did you figure vout = 2*vref?

 

Comparator in close loop system (like this schematic) always holds the bases of T1 and T2 equal (at same voltage) because of regulation. So if Vref is 1.5V the base of T1 is also at 1.5V, the middle point of output 1k-s divider is at 1.5V so base of T2 also.

The voltage across T2 Rc is 0.7V just to T3 starts open a little so T3 collector is able to change an operation point of mosfet according load changes.
This 0.7V is not constant, it changes like 0.65-0.75V when Vcc or load changed to maintain output regulated.

Note: Understand close loop system and it’s precise setting is not a beginner stuff, you need to simulate it and understand the principle. Always read the first part of this post (most important).

 

Comparator in close loop system (like this schematic) always holds the bases of T1 and T2 equal (at same voltage) because of regulation. So if Vref is 1.5V the base of T1 is also at 1.5V, the middle point of output 1k-s divider is at 1.5V so base of T2 also.

The voltage across T2 Rc is 0.7V just to T3 starts open a little so T3 collector is able to change an operation point of mosfet according load changes.
This 0.7V is not constant, it changes like 0.65-0.75V when Vcc or load changed to maintain output regulated.

Note: Understand close loop system and it’s precise setting is not a beginner stuff, you need to simulate it and understand the principle. Always read the first part of this post (most important).

You sfated:
“
The voltage across T2 Rc is 0.7V just to T3 starts open a little so T3 collector is able to change an operation point of mosfet according load changes.
This 0.7V is not constant, it changes like 0.65-0.75V when Vcc or load changed to maintain output regulated.”

my question is how did you derive at the conclusion voltage across T2 Rc changes from 0.65 to 0.75V? Why not 4Vdc why not 3.5vdc? How did you derive it?

 

T3 with 2k2 in base and 1k in collector needs about 0.7V on input to starts open:

Calculation to T3 fully open:

Ic = 5V/1k=5mA
Ib=5mA/200= 25uA(consider beta of T3 as 200)
The voltage across T3 Rb is
Vrb=25uA*2k2=55mV
Together with T3 Vbe=0.6V the voltage across T2 Rc needed:
0.6+55mV=0.655V

 

You wanted 3V out from 3V in. That's not going to happen with an ordinary bipolar transistor either. Your circuit needs about 3V dropout voltage to work satisfactorily, and then it would work with bipolar, darlington or MOSFET (though with an ordinary bipolar transistor the output current will be restricted)

how would one do a 3V dropout then?

3V out from 6V in.

In circuit below transistor M1 has Rds_ON=1.2 mΩ at V_IN = 3 V and I_LOAD = 20 A.

Windings L1 and L2 both are wounded on ferrite ring core
OD = 9 mm, ID = 5 mm, H = 7 mm, μ = 7500
Every winding contains 10 turns wire dia 0.3 mm.
Ferrite ring on Digikey: LFB090050-000
Ferrite ring on Mouser: LFB090050-000

 

The P-ch works in linear region. Once the Vout/2 (given by two 1k-s on output) is more than Vref the 2n3906 opens and starts closing the P-ch, i.e. it keeps the output regulated.
On other hand the same, if Vout/2 is less than Vref the 2n3906 closes and lets open the P-ch, also keeps output regulated.

So the formula Vout vs. Vref is:

Vout = 2 * Vref

The pair of two 2n3904 -s is a comparator.

The 6v8 zener only protects the gate agains overvoltage since this P-ch has 8V Vgs allowed only.

The P-ch has to be mounted on heatsink.

How did you derive Vout = 2*Vref?
I mean why not 3*Vref or 0.5*Vref

 

How did you derive Vout = 2*Vref?
I mean why not 3*Vref or 0.5*Vref

Because it is a non-inverting amplifier so Vout=Vin (1+R1/R2)