Hi,
I have this circuit and I wanted to see if this can drive a logic low here. The output is 2.5V LVCMOS and the input is 1.8V LVCMOS.
R1 is a strapping resistor used on power up to detemine the state of the interface (needed). R3 is an internal pulldown.
I added R2 and R4 to bring the level down from 2.5 to 1.8V.
Thanks!
I have this circuit and I wanted to see if this can drive a logic low here. The output is 2.5V LVCMOS and the input is 1.8V LVCMOS.
R1 is a strapping resistor used on power up to detemine the state of the interface (needed). R3 is an internal pulldown.
I added R2 and R4 to bring the level down from 2.5 to 1.8V.
Thanks!