Hello everyone,


I work at a company focused on PCB reverse engineering. Most of our boards are assembled by JLCPCB, but some critical components are soldered internally, outside the main assembly process, which may introduce additional variability in solder joint quality.


I am currently studying the application of burn-in and thermal cycling tests to detect early-life failures in components and solder interconnections. However, I am facing limitations related to the available thermal equipment.

Available thermal setup

• Temperature range: –10 °C to +60 °C
• Heating rate: approximately +1.6 °C/min
• Cooling rate: approximately –0.5 °C/min
• Resulting cycle rate: about 0.3 cycles per hour
• No capability to reach temperatures ≥ +85 °C

Standards and references considered

• JEDEC JESD22-A104C (Temperature Cycling)
  • Typical ramp rate ≤ 15 °C/min, preferred 10–14 °C/min
  • 1–3 cycles/hour for components
  • 1–2 cycles/hour for solder interconnections
• IPC-9701
  • Most severe industrial environmental range: –40 °C to +85 °C
  • Defines dwell time (tD) associated with time-dependent failure mechanisms such as solder joint creep
• Industrial burn-in profile – Power Integrations (gate drivers)
  • Temperature range: –40 °C to +85 °C
  • Reference:
    https://www.power.com/design-support/gate-drivers/reliability-services/burn-in-process

Comparison: standards vs. available equipment

• The maximum achievable temperature (+60 °C) is below the most severe industrial condition (+85 °C)
• The available ramp rates (~1.6 °C/min) are significantly lower than JEDEC recommendations
• The number of cycles per hour is well below typical normative values

Direct questions

1. Given these limitations, is it technically correct to classify this test as burn-in, or should it be considered only a functional test under moderate thermal stress?
2. Has anyone applied burn-in testing with slow ramp rates and limited maximum temperature and still obtained meaningful technical value?
3. Are there technical references, papers, or best practices that address burn-in testing under such constraints, especially when part of the soldering process is performed in-house?

Any practical experience or reference material that could help properly frame and justify this type of test would be greatly appreciated.


Thank you in advance.

 

For your cooling rate, direct carbon dioxide dump into the test area has worked well at one place I worked, Greater htemperature rise is a bigger challenge. Likewise high temperature bur in.
BUTwhat sort of" a company focused on PCB reverse engineering. "does that sort of testing???