bjt op amp design need help with second stage

Thread Starter

crb123

Joined May 16, 2017
8
Hello, i am trying to model op amp to boost high impedance (10-100)microVolts to (plusMinus 1volt )...please see attached simulation design, from first stage i have boosted (input delta20uV) to (output (pink wave)about delta49mV). which is at dc level +3.23V.......but am having problem adding the second stage....(blue wave) possitive peak is good to 1.5v but negative peak doesn't look right 1.jpg2.jpg.....any suggestions please...or links to resources i could look into...thank you.
 

ci139

Joined Jul 11, 2016
1,574
Q18 Q10 for output is a bit . . . not too good design

(Q17 Q5) (Q7 Q6) is not good practice (slows down the input and phase - further causes instability)

you have an open loop configuration (there's no negative feedback) -- so that shows your voltage gain is poor - 50k eg 50000x is poor 100000 is moderate poor 200k is ok (the higher the gain the better the precision and the higher the upper bandwidth) , , ,
. . . although for starting anything above 200x is a good achievement /// use ±10V and higher supply = you will avoid common mode and offset problems . . .

there is no reason to panic about ↑↑↑ just do it again (& again(& again(& again))) and do it better until it works as you planned
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It takes a warm up (i have not played around with these things lately) -- but i managed to quickly assemble a simple/slow/poor Op-Amp works about up to 1kHz
Simple - OpAmp Dev rig - FD -- Ni - Cfg.pngSimple - OpAmp Dev rig - FD -- iN - Cfg.pngSimple - OpAmp Dev rig - TD -- iN - Cfg.png____________________
+the dev. configuration :
/// it does not much work without feedback . . . and has a poor DC performance -- but it does somethingSimple - OpAmp Dev rig - TD -- Ni - Cfg.png
 
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ci139

Joined Jul 11, 2016
1,574
Yes, . . . speak up . . . ask questions
? What is the aim planned use of this device -- supply- input- output- frequency- (output)power- range , where it goes when ready (target app.)
? Is there a specific example design you are modifying -- ? a link to // would help to match . . . also "to do next" dev. plan

i just provided an example how you can tweak a random op amp to it's better form → keep it in the unity gain cfg. at the supply median , vary supply , amplitude , frequency . . . try to extend the range for each

the option B is to make a computer program that computes (attempts to bind) your !existing/fixed! schematic to it's optimum // while the previous option allows you to apply random modifications where they seem to be required . . . and test whether you were thinking correct
 

Thread Starter

crb123

Joined May 16, 2017
8
Thank you...again....this a a homework!! ...so not much for practicality......
Conditions given supply limited to +/-4.2V....input signal (10-100)uV @40Hz....with high impedance of 20Meg in parallel with 10pF. Output required +/-1V. Thats it.

I have input signals passing through darlington emmiter follower to overcome that high impedance input....
 

ci139

Joined Jul 11, 2016
1,574
if you 're allowed to use j-Fets for input your life gets a bit easier

darlington emmiter follower to overcome that high impedance input....
yes but your errors by shoulder multiply that way -- say \[ G_\text{TOT}·\left(1+\frac{\Delta G_\text{TOT}}{G_\text{TOT}}\right)=G_1·\left(1+\frac{\Delta G_1}{G_1}\right)·G_2·\left(1+\frac{\Delta G_2}{G_2}\right)·G_3·\left(1+\frac{\Delta G_3}{G_3}\right) \]

for the school prj. you ... should ... follow ... a known example = if you have earlier v. of this circuit of yours - pick the mod that resembles to anything in a text book the most

input signal (10-100)uV @40Hz....with high impedance of 20Meg in parallel with 10pF.
true but your experiment setup has double that

your OUTP graph looks logarithmic but it may be due you are using the CE OUTP Stage . . . e.g. a Class A

. . .

basically the diferential input stage just provides the "differentiating" e.g. common signal cut off -- the gain is got by voltage amp that usually follows the dif. inp.
 
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ci139

Joined Jul 11, 2016
1,574
what is your exact task get amplification of ( \( \frac{100µV+10µV}2±\frac{100µV-10µV}2 → 0V±1V \) ) "=" ( \( 55µV±45µV → 0V±1V \) )
→ \( K_U=\frac{1V}{45E-6V}=\frac{1E+6V}{45V}=\frac{200'000}{9}=22222.222...≈22k \) . . . using 1 opamp only ?? ... and that opamp must be self invented ??? // or can you use readily avail op amps ?

the high sensitive old/simple opamps are :

  1. LM201 (input stge + more @ pg.13 , Vos = 700µV)
    ↕ cross-referencing the circuit diagram avail here ↕
  2. LM208 (erroneous schem. @pg.3 , Vos=700µV)
    .
  3. OP07 (Vos = 30µV)

LM108 (fix)apx. LM108-308.gif
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About using multiple stages to get your high gain :

LM201 see "Instrumentation amplifier" pg.11 (double op amp)
https://en.wikipedia.org/wiki/Instrumentation_amplifier (multi op amp)
AN-32 FET Circuit Applications see "FET Op Amp" (with FM3954) pg."10"/11 (j-Fet amp from bipolar) + Fig.7 pg.7 , Fig8 pg.8
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it seems you may need to use both -- the 1-st to reduce impedance , the 2-nd to add voltage gain ← to do this with single op amp is a bit demanding ???
20kAmp-Concept-1.png
 
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