hi Kevil,
Seems to be a OPA model problem.
For test used a CA3140.
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Changed many things. Slowed it down. Ron=100 ohms to not suck the battery down. Cap = bigger.
Measure the time it takes for the voltage to charge back up to 2V. The time is related to C, R and Battery voltage.
The "my switch" is a pull down MOSFET or IO port pin.

 

hi Kevil,
Seems to be a OPA model problem.
For test used a CA3140.
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Although I have Bordodynov library. I got error when I run the simulation. What's wrong?

 

hi k,
That error message is showing a problem in U1 the OPA.

Try a OPA from the LTS library F2.

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hi k,
That error message is showing a problem in U1 the OPA.

Try a OPA from the LTS library F2.

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I don't have the CA3140 in ...\Documents\LTspiceXVII\lib\sym\OpAmps but in Bordodynov library Sborka.lib in ...\Documents\LTspiceXVII\lib\Bordodynov\lib\sub

Maybe it could help me if you can copy here the lib description for CA3140 from your lib file. E.g.:

.subckt CA3140 1 36 15 20 12
*START OF DECK
* +IN -IN OUT +VSS -VSS
*NODE: 1 36 15 20 12
*------INPUT STAGE-------
VOSBAL 7 29 3.00000000E-03
...

 

hi k,
This is the CA3140.sub [ used the extra .txt to enable an upload.]

Delete the .txt after download
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I guess you know how to create an Autogenerated model entry

 

Thank you. I will have a look on it.

 

Hi ericgibbs,

Please can you post a detail graph with single red spike V(n003)? I have SPICE model of the MAX40023 Op Amp for OASIS SIMPLIS simulator and I am working on the simulation. Thank you.

 

hi Kevil,
Do you mean like this image.?

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Update:
Note the image had a line missing, no idea why, this a corrected image.
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Thank you for fast reply.

 

hi Kevil,
I have measured the pulse width when Vin is 4.4v and 3.3v
There is only a small change in width, 254uS at 4.4v and 250uS at 3.3v

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It looks like it should be possible to measure the battery voltage with capacitor voltage divider, Op Amp and ADC.

 

It looks like it should be possible to measure the battery voltage with capacitor voltage divider, Op Amp and ADC.

Not with the circuits in post #11. There is no capacitive divider! It is just a unity gain buffer and its output has a capacitor to ground (surprised it is still stable) and a bootstrap capacitor to the input. The output is 3.3V because the op-amp is powered from 3.3V and it is in clipping, because its input is at 4.4V

 

I didn't notice that the "-" input of the op-amp is connected to C2, which it shouldn't be. The op-amp should work as the voltage follower.

I am going to simulate the circuit with MAX40023 op-amp in OASIS SIMetrix simulator. SPICE data for MAX40023 are available here.

 

I didn't notice that the "-" input of the op-amp is connected to C2, which it shouldn't be. The op-amp should work as the voltage follower.

hi Kevil.
I have no idea how that asc file was changed.???
My PC version of the asc file is the same as the original you posted... very strange.

Apologies for an inconvenience it may have caused.

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If both divider capacitors are the same physical size, and you assume 10GΩ of pcb surface leakage across each, within a minute the voltage on the inverting input of the op-amp will be half the battery voltage. If the actual surface resistance varies due to contamination, then it could be anywhere between 0V and full battery voltage.

 

I run the single 250 ns ADC battery voltage measurement each hour. When I unplug and plug again the development board (ATSAMR34- Xplained, without Op Amp) to USB port before each meaurement I am getting pretty steady right results. When I keep the board plugged the measured voltage decay. First picture Vbat 4.V and two other pictures Vbat 3.3V.

 

That’s because capacitive dividers don’t work with DC. @MrSalts said that in post#2, and many people have suggested alternative schemes.
If you return to the capacitive divider you return to a circuit that doesn't work. Of course, you can use SPICE to make it look as though it might work, but SPICE uses perfect components, with no leakage resistance.
Put 10GΩ across each of your capacitors and run it again.

 

I have just added TI LMC6482 (without the C=0.1µF) to capacitor voltage divider and I am getting rock steady ADC values without any problem. For 4.12Vbat 214 (0xD6) and for 3.3Vbat 162 (0xA2). ADC 8-bit resolution, Vref 3.3V and sampling time 250ns.

 

hi K,
Please to hear that, could you please post your final circuit.?
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Update:
Downloaded the LMC model and created a working LTS test circuit, ready for your circuit test.
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