I was studying the structure of MOSFET and came across that NPN BJT acts as a parasitic transister between the source and drain. So what happens when the base and the emitter are shortcircuited? It is stated that the BJT is in cut off state. Can someone explain to me how that happens. I'm a bit confused. Here the Drain and the source are connected to a Vdd source and the gate is conneted to Vgs source.

 

In an NPN BJT, conduction can ONLY occur when the base is at a potential of about 0.7 volts above the emitter. When the base and the emitter are shorted together, this cannot happen -- no current can flow from the collector to the emitter.
The gate of the MOSFET is insulated from the rest of the device by a layer of Silicon Dioxide. As Vgs rises, it charges up the gate, as if it were a plate on a capacitor, and there is an electric field created. This electric field creates either an enhancement region or a depletion region in the channel between the source and the drain. Thus controlling the amount of current which can flow in the channel.

Post the diagram you are looking at if you can. I kinda like this one.

https://www.electronics-tutorials.ws/transistor/tran_6.html

 

A MOSFET does have a body diode, which could be considered 'parasitic'.

 

I was studying the structure of MOSFET and came across that NPN BJT acts as a parasitic transister between the source and drain. So what happens when the base and the emitter are shortcircuited? It is stated that the BJT is in cut off state.

That's correct.

Whenever you have adjoining P and N regions, you form junctions. With a MOSFET (P in this case), they can create a BJT:


In most commercial parts, the source is connected to the bulk which shorts one of the junctions of the BJT, thus preventing it from turning on. In 4 terminal devices, you connect bulk to the most negative voltage unless you know what you're doing and want to modify body bias.

 

In an NPN BJT, conduction can ONLY occur when the base is at a potential of about 0.7 volts above the emitter. When the base and the emitter are shorted together, this cannot happen -- no current can flow from the collector to the emitter.
The gate of the MOSFET is insulated from the rest of the device by a layer of Silicon Dioxide. As Vgs rises, it charges up the gate, as if it were a plate on a capacitor, and there is an electric field created. This electric field creates either an enhancement region or a depletion region in the channel between the source and the drain. Thus controlling the amount of current which can flow in the channel.

Post the diagram you are looking at if you can. I kinda like this one.

https://www.electronics-tutorials.ws/transistor/tran_6.html

Thanks,
I'm studying about the structure of high power mosfets, and this is the planar vertical diffused MOS (VDMOS) for n-channel.