I've been playing around with a couple of NE555 PWM circuits in an effort to create a LED dimming solution (indicator and backlight) to include in an audio output switching circuit (like an A/B box).

The goal is the widest possible duty-cycle range -- from nearly 0% off to nearly 100% on -- at the lowest possible frequency that is relatively stable and appears flicker-free to both human eyes and common cameras.

The best results I've generated so far have been from the circuit below but omitting R1, R2, and R3 and simply swapping C4 to get an acceptable frequency.



The circuit was lifted from the oscillators module at learnabout-electronics.org.

Is it safe to omit R1, R2, and R3? Or, do they serve a purpose beyond timing the charge/discharge cycle of C4?

If it matters, the output will be hitting the gate of a N-channel MOSFET set up as a low-side switch. I'm currently using a BS170 as it has the highest current-handling capability among the parts I have on hand. Recommendations for a similar part with a higher current-handling capability would not go unappreciated (1A? Maybe 2A?) as the number of LEDs I'll be driving with this circuit is variable.

Thanks!

 

Hello,

You can omit R1 and R2.
R3 can be reduced to 1K.
This will likely give you a range from 1 to 99 %.

Bertus

 

R3 can be reduced to 1K.

Could you explain why it can be reduced but not (or shouldn't be) removed?

 

pin 3 is output. pins 2 and 6 are inputs. i see no problem connecting an output to one or more inputs so removing R3 should be fine as well unless pulling inputs to close to power rails causes latchup.

 

WHY does the TS want to remove the two resistors??? Does the TS have any understanding of what effect having the resistors and diodes is??
I suggest that the TS explain what the purpose of making that change is, what part of the timer function do they want to change.

 

Could you explain why it can be reduced but not (or shouldn't be) removed?

R3 is there to limit the current when the pot is all the way to one side or the other. Without it, the output is being connected to the cap via the diode, both of which serve to clamp the output, which means that the output will be dragged around and the current into or out of the cap will be unpredictable. Not the behavior you want in the part of the circuit that controls your timing.

At first blush, it seems like R1 and R2 are there to serve the same purpose, so you can either eliminate both of them and leave R3, or you can leave both of them and remove R3. The NE555 is spec'ed for ±200 mA, so it can feed a pretty small resistor. The TS doesn't say what Vcc is, but let's call it 15 V. Ignoring the diode drop, that means the resistor starts with 10 V across it under worst case conditions, which means that (on paper) the current limiting resistors could be as low as 50 Ω. But that is pushing it and the ability of the chip to keep the output voltage constant at those currents is impacted.



Depending on Vcc, you want to keep the peak current down in the 10 mA range to avoid having the output voltage change considerably as the timing capacitor charges voltage. So that 50 Ω becomes 1000 Ω.

Now, having said that, if you are adjusting the pot manually to achieve the duty cycle you desire, this becomes much less of an issue. But even then, you probably want to keep it limited to not much more than that to get a more stable duty cycle that doesn't drift as the part changes temperature.

 

Do you need the diodes? They are effectively out of the circuit at the ends of the pots travel , don't know what it would do towards the middle. Keep some resistance in series with wiper arm of pot to limit current at ends of pot travel.

 

Hello,

@jaclement
The diodes are needed to have different charging and de-charging times.

Bertus

 

I'm having trouble reasoning out how the diodes are functioning as "clamps" as their purpose is to steer the charge and discharge currents thru different paths in the pot.

I see nothing on the output that needs its voltage restrained to .7 or even any components in direct parallel with the diodes that would be "clamped".

Perhaps the term was used in some other context...I don't know of.

 

R3 is there to limit the current when the pot is all the way to one side or the other.

Keep some resistance in series with wiper arm of pot to limit current at ends of pot travel.

That answers the primary question with regard to R3 -- it does have a purpose beyond timing the charge/discharge cycle of C4. Thanks! In everything I've read about this circuit, and circuits like it, that resistor is only ever explained within the context of timing rather than, or in addition to, current limiting.

The TS doesn't say what Vcc is, but let's call it 15 V. Ignoring the diode drop, that means the resistor starts with 10 V across it under worst case conditions, which means that (on paper) the current limiting resistors could be as low as 50 Ω. But that is pushing it and the ability of the chip to keep the output voltage constant at those currents is impacted.

Vcc is 9V. Sorry. I should have mentioned that in the OP.

How have you determined the 5V drop from 15V to 10V? You mentioned "worst case conditions." Is that just extreme temperature?

If I'm reading the datasheet correctly, under normal operating conditions I should expect a voltage drop of roughly 1.4V. So, if I'm doing the math correctly, (9v - 1.4V)/0.01A = 760Ω.

Am I on the right track here or way out in the weeds?

 

Do you need the diodes? They are effectively out of the circuit at the ends of the pots travel , don't know what it would do towards the middle. Keep some resistance in series with wiper arm of pot to limit current at ends of pot travel.

The diodes are the key to making the duty cycle adjustable, which is the TS's objective.

If you eliminate the diodes, then all you are adjusting is the frequency of the waveform while the duty cycle remains near 50%. The diodes allow one path to be used for charging and the other path to be used for discharging, yielding different charge and discharge times, hence a different duty cycle.

But what about the frequency? Does it change as the pot position is adjusted?

Let's do the math.

The trigger and threshold points are at Vcc/3 and 2·Vcc/3, respectively. The output of the 555 is not going to be 0 V and Vcc, as it is dependent on the output current plus, in the case of Vcc, about two diode drops in the output drive stage. For now, let's call them Vhi and Vlo.

The initial and final currents at the switching points will be:

Charging:

I_c0 = (V_hi - Vcc/3) / R_c
I_cf = (V_hi - 2·Vcc/3) / R_c

Discharging

I_d0 = (2·Vcc/3 - V_lo) / R_d
I_df = (Vcc/3 - V_lo) / R_d

What's of interest right now is the ratio of the initial and final currents, as that is what will give us a feel for the variation in current over the charge/discharge cycle. By quick inspection we can see that we can expect it to be about 2:1, which makes sense. But let's run it out.

I_c0 / I_cf = (V_hi - Vcc/3) / (V_hi - 2·Vcc/3)

I_d0 / Idf = (2·Vcc/3 - V_lo) / (Vcc/3 - V_lo)

If V_hi = Vcc and V_lo = 0 V, then both of these become identically equal to 2, and that is probably good enough for our purposes. But let's see the impact that the diode drops in the output stage have on the charging ratio. It is about two diode drops, so we have:

V_hi = Vcc - 2·Vd

I_c0 / I_cf = (Vcc - 2·Vd - Vcc/3) / (Vcc - 2·Vd - 2·Vcc/3)
I_c0 / I_cf = 2·[(Vcc/Vd - 3) / (Vcc/Vd - 6)]

For Vcc = 15 V and Vd = 700 mV, this is about 2.4, while for Vcc = 5 V it is about 7.3. Since it's about 2.7 at Vcc = 10 V, we can use a factor of three unless we are running much below 10 V.

The charging ratio is much less sensitive as long as we keep the peak current under about 10 mA, but it will still be greater than two, so let's call it three, as well, to make our lives a bit simpler.

By limiting the current to less than 10 mA, we keep Vd at about 0.7 V, on average, at room temperature. We can ignore the variation in V_lo, which changes from about 50 mV to 100 mV, as it likely gets swamped by the variation in the diode voltage drop as the current changes, which we can see goes from (typically) about 730 mV down to 675 mV. To make life easy, we'll assume a diode drop of 700 mV, at this current level. So we can set V_lo at 0.1 V and Vd at 0.7 V from this point forward and be in a pretty good ballpark.



Keep in mind that lower currents make our assumptions better, so if we can limit the current to 1 mA instead of 10 mA without ending up with unreasonable component values, we should do that.

We don't know what frequency the TS is targeting, and the offered circuit doesn't shed any light since it is just an example circuit lifted from some website. He says he wants the lowest frequency that appears flicker free to human eyes and cameras. For humans, that's something in the 30 Hz range, though higher is better. But for cameras, that depends entirely on the camera, but is probably going to be quite a bit higher. Also depends on whether we are talking still shots or video. But, for discussion's sake, let's say that 1000 Hz is good enough and, somewhat arbitrarily, use that.

Now, what about that frequency?

The charging and discharging are first-order exponentials, but we can take a very crude shot at setting the component values by assuming a constant current about midway between the initial and final currents. Let's go ahead and stick with a peak current of 10 mA, keeping in the back of our minds that 1 mA is much better, if practical. With a variation of a factor of three, that means that our midpoint is about 6.5 mA. It will spend longer at the lower currents, so let's call it 5 mA to keep the math easier (hopefully).

At 50% duty cycle, we want the charging and discharging time to each be 500 µs (to give us a 1 ms total period, to get 1 kHz).

If we want the initial current to be less than 10 mA, then the total resistance needs to be greater than

I_d0 < (V_thres - Vd - V_lo) / R_d < 10 mA

Rd > (V_thres - Vd - V_lo) / 10 mA

Rd > (2·Vcc/3 - Vd - V_lo) / 10 mA

At the various values of Vcc, this works out to be about

Vcc = 15 V --> Rd > 920 Ω
Vcc = 10 V --> Rd > 587 Ω
Vcc = 5 V --> Rd > 253 Ω

Here we used the discharging side as that has the higher currents due to the diode drops in the output stage.

Seeing that the minimum resistance at 15 V is close to 1 kΩ is reassuring, since that is what our previous work indicated as the minimum resistance to keep the current below 10 mA at 15 V, so we probably haven't made any big mistakes.

Next, we can get a feel for what the capacitance needs to be, since it has to change it's voltage by Vcc/3 on each half cycle. At an average charging current of 5 mA, this takes

Q = CV
dQ/dt = I = C·dv/dt < 10 mA
C < I·dt / dV = I·dt / (Vcc / 3) < 3·I·dt / Vcc

Vcc = 15 V --> C < 500 nF
Vcc = 10 V --> C < 750 nF
Vcc = 5 V --> Rd < 1500 nF

So, at 10 mA peak current, you are looking at a timing capacitor in the 1 µF range. This is quite doable in a through hole ceramic capacitor these days. Note that if we cut the peak current by a factor of ten, we also reduce the size of the timing capacitor by ten, and 100 nF ceramic caps probably more commonly available at a lower price. But we'll continue to stick with 10 mA, so let's choose a 500 nF capacitor, keeping mind that this is presently based on a very crude calculation, so we may have to revisit this later but it should be close enough to be workable. If it turns out it isn't, we've likely made a mistake somewhere.

Now let's take a detailed look at the charge and discharge times. We will assume that the output voltage is able to stay constant and that the diode drop also remains stable throughout the cycle. Relaxing these assumptions is best done via simulation using suitable device models.

For the circuit given in the original post, if we have the pot, Rp, set at α, where α is 0 when the wiper is all the way to the left and 1 when the wiper is all the way to the right, then the charging resistance is

Rc = R1 + R3 + αRp

The discharging resistance is then

Rd = R2 + R3 + (1-α)Rp

If the 555 output was rail to rail and if we didn't have the diode drops in there, the times to charge and discharge, respectively, would be

Tc = τ_c·ln(2) = Rc·C·ln(2)
Td = τ_d·ln(2) = Rd·C·ln(2)

Unfortunately, we do have to contend with the high output being significantly below the rail and the presence of the diodes. This is particularly the case at lower values of Vcc.

If we work through the math, this gives us a charging time of

Tc = τ_c·ln(2·[(1 - 1.5(Vd/Vcc)) / (1 - 3(Vd/Vcc))]) = τ_c·Kc

Note that, for Tc, we are assuming that the output voltage drop is twice the voltage drop across the diode. This assumption gets worse as we lower the output current as the diode drop across the physical diodes gets lower, while the output drop stays pretty constant. But we'll ignore that as being a relatively minor effect best dealt with via good simulations.

At the different Vcc values, we have Kc values of

Vcc = 15 V --> Tc = 0.771·τ_c
Vcc = 10 V --> Tc = 0.818·τ_c
Vcc = 5 V --> Tc = 1.00·τ_c

For the discharging portion, we have

Td = τ_d·ln(2·[(1 - 0.5(V_lo/Vcc)) / (1 - (V_lo/Vcc))]) = τ_d·Kd

At the different Vcc values, we have Kd values of

Vcc = 15 V --> Td = 0.696·τ_c
Vcc = 10 V --> Td = 0.698·τ_c
Vcc = 5 V --> Td = 0.703·τ_c

Notice the asymmetry in the multiplying constants (which, in the ideal case, would all be ln(2)=0.693) due to the voltage drop in the output stage when the output is HI. At low Vcc, this difference is ~30%, which would be quite noticeable in many cases. If we want to have a 50% duty cycle when the pot is in the center, we need to have different fixed resistors, which necessitates keeping R2 and R3 in the circuit so that we can accommodate this. Because Tc is always more than Td, we need Rd to be greater than Rc to compensate, which means R2 > R1. We could accomplish this by setting R1 = 0 and putting either a fixed R2 or a rheostat-configured pot in the other side. Doing this would give us nice, fine adjustment over the asymmetry, but require that R3 be in place to provide the current limit. In addition, R3, sets the frequency when the pot is centered, so we probably want it to be a rheostat, as well. We can therefore see that R1, R2, and R3 play different roles and that we might actually want all three (or at least R2 and R3).

We've learned quite a bit thus far, but are now able to start getting at the question of how much the frequency changes as we change the duty cycle.

The frequency is the reciprocal of the total period, which is the sum of the charging and discharging times.

To = Tc + Td
To = Rc·C·Kc + Rd·C·Kd
To = C·(Rc·Kc + Rd·Kd)

To = C·((R1 + R3 + αRp)·Kc + (R2 + R3 + (1-α)Rp)·Kd)

To = C·( [(R1 + R3)·Kc + (R2 + R3)·Kd] + [(α·Kc + (1-α)·Kd)·Rp] )

If Kc = Kd = K, then this would reduce nicely to

To = C·(2·R3 + R1 + R2 + Rp)·K

In which case, the setting of Rp would have no effect on the frequency. Unfortunately, Kd is not equal to Kc, so the pot setting does have an effect, thus, whenever we change the duty cycle, we change the frequency.

How might we get around this -- or at least reduce its impact?

We know that the big issue is that the output, when HI, isn't Vcc, but rather Vcc - 2·Vd.

What if we artificially made the output when low be elevated by the same amount that Vhi is depressed, namely about two diode drops?

We can do this by putting two more diodes in series with D2. We could also use a Vbe multiplier to give us some fine adjustment over this effect and tune it to give the frequency minimal sensitivity to the pot setting.

Another thing to consider is what the minimum voltage that we can expect the circuit to work at at all.

The capacitor needs to swing between Vcc/3 and 2·Vcc/3. That means that Vcc must be high enough so that, despite the voltage drop in the output stage and the voltage drop across the diode, we can actually get the capacitor up to the threshold voltage. Thus we require, at a bare minimum,

Vcc - 1.4 V - 0.7 V > 2·Vcc/3

This, in turns, requires

Vcc > 3(1.4 V + 0.7V) = 6.3 V

You could improve this a bit by using Schottky diodes for D1 and D2, but that would only gain you about 400 to 500 millivolts.

But, at that voltage, it will take a very long time for the cap to reach the threshold because we are well out into the tail of the exponential, so our timing will become very sensitive to noise. We probably don't want to run it with a Vcc much below 8 V, and even there we might get quite a lot of jitter.

This is also why most reference circuits avoid using the output as part of the timing path. In many ways, you want the timing portion to be isolated from the vagaries of the output's behavior.

 

I'm having trouble reasoning out how the diodes are functioning as "clamps" as their purpose is to steer the charge and discharge currents thru different paths in the pot.

I see nothing on the output that needs its voltage restrained to .7 or even any components in direct parallel with the diodes that would be "clamped".

Perhaps the term was used in some other context...I don't know of.

It has nothing to do with "needing" to restrain the output. It has to do with the fact that the diodes and capacitor WILL restrain the output.

Let's consider the case where the capacitor has discharged to its lowest level of Vcc/3 and now the output goes HI, which is ideally Vcc, but in reality for the NE555 will be about Vcc - 1.4 V.

But is this possible?

If it is, what is the voltage across that diode at this instant?

The output is Vcc - 1.4 V and the capacitor voltage (which cannot change instantaneously) is Vcc/3. If there is no resistor there (because R1, R2, and R3 have been removed and the pot is at the extreme end of its travel in that direction), the the diode has a voltage across it of 2Vcc/3 - 1.4 V. For Vcc = 15 V, that's 8.6 V. What does the current need to be in a 1N4148 diode to produce 8.6 V across it? Answer: A hell of a lot more than the 200 mA the NE555 is spec'ed to be able to deliver. Per the diode data sheet, the typical voltage at 200 mA is just over 1 V, so the output of the 555 will be clamped at about 6 V or a bit above and the 555 will be delivering at much current as it possibly can, which is going to vary considerably from device to device and also be very dependent on temperature and phase of the moon. The end result is that the timing behavior will suck big time.

The exact same effect is at play when discharging, but the max current that a given device can sink is largely unrelated to the max it can source, so again the timing behavior becomes very unpredictable and erratic.

 

That answers the primary question with regard to R3 -- it does have a purpose beyond timing the charge/discharge cycle of C4. Thanks! In everything I've read about this circuit, and circuits like it, that resistor is only ever explained within the context of timing rather than, or in addition to, current limiting.



Vcc is 9V. Sorry. I should have mentioned that in the OP.

How have you determined the 5V drop from 15V to 10V? You mentioned "worst case conditions." Is that just extreme temperature?

If I'm reading the datasheet correctly, under normal operating conditions I should expect a voltage drop of roughly 1.4V. So, if I'm doing the math correctly, (9v - 1.4V)/0.01A = 760Ω.

Am I on the right track here or way out in the weeds?

The capacitor voltage operates between Vcc/3 (at which point it begins charging back up) and 2·Vcc/3 (at which point it begins discharging back down).

For Vcc = 15 V, that means that the capacitor swings between 5 V and 10 V.

At the bottom end, after it switches, the output voltage is ideally Vcc, but in reality about Vcc - 1.4 V. Then another 0.7 V is dropped across the D1. So the voltage across the resistors is Vcc - 2.1 V - Vcc/3, which for 15 V is about 7.9 V.

But for discharging, the voltage of the cap starts at 2·Vcc/3 and the output is very close to 0 V, let's call it 0.1 V. There is also the diode drop, so that puts the voltage across the resistors at 2·Vcc/3 - (0.1 V + 0.7 V), which for 15 V is about 9.2 V.

The higher of those two is what you want to use to set your limits, which is the discharging side of things.

For Vcc = 9 V, that would work out to a starting voltage drop of about 5.2 V, putting your minimum resistance at 520 Ω. But I would recommend operating at closer to 1 mA, so make it 5.2 kΩ. Note that 5.1 kΩ is a standard resistor value.

 

@WBahn , I sincerely appreciate the effort!

It's going to take me a while to work through it all but I wanted to post a quick thanks before too much time passes and before I start digging into it. So, thanks! Hopefully when I return I won't have too many stupid questions.