hi,
What is the output impedance of the DSS which drives the OPA, also what is the input impedance of the VSWR.?
E

 

I thought I explained about the 1kΩ resistor.In comparison with 50 Ohm, the output signal is almost twice as large.On a 1kΩ resistor, about 0.6mV drops.This offset is added to the bias voltage of the operational amplifier.The output level (on DC) will be more because of the gain.
When you connect a load of 50 Ohm, there will not be any generation (oscillations), but the signal will decrease twofold.

 

Mr. @Bordodynov and Mr. @ericgibbs :

apparently I'm running into many noise and instability issues due to the many floating wires I was using (by floating I mean wires in the air going from one point of the circuit to the next). All those wires were acting like antennas and adding a lot of trouble to the signals. My teacher told me to remove as much wires as I could and use resistor leads to solder the various parts of the whole circuit all on top of each other and that these resistor leads shouldn't be more than 2 or 3 cm long. So I did and things improved a little. But he also suggested me to start a new design for this amplifier including SMA connectors so that we can use 50 ohm impedance cables instead of wires and/or resistor leads to put "the pieces" together! That's what I'm doing now.

But I have a question about the amplifier circuit. The datasheet of the opamp we used, suggests this circuit but with a small (or not that small) difference.

View attachment 159984
That input resistor is 50Ω at the non-inverting input pin. In the circuit Mr. @Bordodynov designed in LTSpice, a 1k Ω resistor was used.
Why he chose this value instead of the 50Ω? And what impact would it have if a 50 Ω resistor was used?
I tried to change that resistor in LTSpice but I just noticed a drop in the final gain! Which is the opposite of what I need!

In post #94, connection shown between the lead from Rf to the top of Rg should NOT be connected to the negative power source line. That is a drawing error.

 

In post #94, connection shown between the lead from Rf to the top of Rg should NOT be connected to the negative power source line. That is a drawing error.

Indeed. That is not the case in the real circuit as shown in LTSpice simulations.

 

Indeed. That is not the case in the real circuit as shown in LTSpice simulations.

I observed that, the spice simulation circuits are more correct. But not everybody who reads the posts here is able to instantly recognize that fact. Thus my comment. No benefit is served by leaving errors uncorrected.

 

hi,
What is the output impedance of the DSS which drives the OPA, also what is the input impedance of the VSWR.?
E

Datasheet of AD9850 (not the ebay module itself) says output impedance of 50kΩ (min) up to 120kΩ typical value. But this is at the ADC charateristics section. Is this the output impedance you're looking for?

 

I'm a bit lost about the resistors you are talking about.
Let me try to rephrase your post to see if I understood it correctly.

n comparison with 50 Ohm, the output signal is almost twice as large.

So, when we compare Rt=50Ω with the same Rt=1kΩ, the output signal is almost twice as large as if Rt=1kΩ??? I observed otherwise. When I chose Rt=50Ω, this is what I get:



With 1kΩ, I get this:

On a 1kΩ resistor, about 0.6mV drops.

You mean this 0.6mV drop is at the output or at what point?

The output level (on DC) will be more because of the gain.

This was meant to be under which condition? Rt = 50Ω or Rt = 1kΩ?

When you connect a load of 50 Ohm, there will not be any generation (oscillations), but the signal will decrease twofold.

I understand that due to the voltage divider that "is created", so to speak, with the resistor datasheet suggests due to possible capacitance on the load. But the resistor is needed, right? The one to help making the opamp stable!

 

Unless the generator (source) impedance is truly ZERO, changing the load on the output will change the voltage at the output. And while in theory the output of a perfect op amp system is zero, perfect op amps are mostly found in simulators and text books, not in reality.
Thus it is entirely reasonable that changing the load resistance from 50 ohms to 1000 ohms would increase the output, both voltage and power, since the higher load resistance means less power spent in the device's internal resistance.

 

It may be nearly impossible with a ready-built module, but the standard method for amplifying the output of the DAC of DDS chip is to use a differential input transimpedance amplifier because the DAC provides differential current, not voltage, output.. If the DAC is terminated with a simple load resistor, the current is converted to a voltage which is then converted back to a current with a conventional op amp circuit.

The output impedance of the module is likely nominally 50 ohms due to use of a 50 ohm termination of one side of the DAC to ground. Note that most good quality signal generators are series terminated at 50 ohms, so the behavior of the DDS module and a signal generator will be quite different with regard to termination at the far end of a connecting cable. Series termination at the source and parallel at the destination is common with fast analog circuitry, at the cost of loss of half the signal amplitude.

 

Unless the generator (source) impedance is truly ZERO, changing the load on the output will change the voltage at the output. And while in theory the output of a perfect op amp system is zero, perfect op amps are mostly found in simulators and text books, not in reality.
Thus it is entirely reasonable that changing the load resistance from 50 ohms to 1000 ohms would increase the output, both voltage and power, since the higher load resistance means less power spent in the device's internal resistance.

I'm not sure I'm explaining myself very well because I keep reading replies speaking about load resistance and my question is only about the 1kΩ resistor at the OPA691 input pin. And I get confused because I can't understand if you're speaking about load resistance to justify the 1kΩ resistor at the OPA691 input pin or if this is just misunderstanding of my question.

It may be nearly impossible with a ready-built module, but the standard method for amplifying the output of the DAC of DDS chip is to use a differential input transimpedance amplifier because the DAC provides differential current, not voltage, output.. If the DAC is terminated with a simple load resistor, the current is converted to a voltage which is then converted back to a current with a conventional op amp circuit.

The output impedance of the module is likely nominally 50 ohms due to use of a 50 ohm termination of one side of the DAC to ground. Note that most good quality signal generators are series terminated at 50 ohms, so the behavior of the DDS module and a signal generator will be quite different with regard to termination at the far end of a connecting cable. Series termination at the source and parallel at the destination is common with fast analog circuitry, at the cost of loss of half the signal amplitude.

Ok, but still this is not answering my question about the 1kΩ resistor! I'm sorry if I'm not getting your point, guys!

 

OK, this time I am addressing the 1K resistor from the + input to ground (R1), versus the 50 ohm resistor in the same location, each with the same 50 ohm series resistor at the input. In the one case, the voltage divider delivers Vin x 50/(50+50) to the + input, while in the second instance it delivers Vin x 1000/(50+1000) to the same input.

 

Good morning.
@MisterBill2 the resistor you called R1, I think you meant Rt. R1 is the resistor in series with the opamp output. Am I correct?

Other than that I understand.

 

Morning Jose.
My advice would be to post a marked up drawing, showing the resistor values and their names.
Its becoming a little confusing.

I think the R1, is the original 1k resistor that was connected from the OPA's non inverting input to 0v.??
If that is correct, whatever the output impedance of the DSS is, it will effectively connected to 0v via that 1k.
This means it is resistive potential divider of the DSS output Zo and the 1k.
So reducing it to 50R will reduce the signal level at the junction of the divider.
Do you follow OK.
Eric

 

Morning Jose.
My advice would be to post a marked up drawing, showing the resistor values and their names.
Its becoming a little confusing.

I think the R1, is the original 1k resistor that was connected from the OPA's non inverting input to 0v.??
If that is correct, whatever the output impedance of the DSS is, it will effectively connected to 0v via that 1k.
This means it is resistive potential divider of the DSS output Zo and the 1k.
So reducing it to 50R will reduce the signal level at the junction of the divider.
Do you follow OK.
Eric

Yes, I follow.
The original circuit have Rt, RF and Rg. Later I added R1 which is the resistor in series with the opamp output. I think I have never changed any names since then.

But adding a 1k Ω resistor at Rt wouldn't that also add reflections and impedance mismatches? I understand that if I use 50Ω resistor, the input voltage of the opamp will be also lower. So I think this is a balanced compromise between input voltage and the possible instability added?

 

See

 

Good morning.
@MisterBill2 the resistor you called R1, I think you meant Rt. R1 is the resistor in series with the opamp output. Am I correct?

Other than that I understand.

You are correct, I am referencing that resistor between the + input terminal and the ground symbol. With my tires eyes yesterday that "t" looked like a "1". Today with rested eyes it does look like a "t". Sorry about the confusion.

 

@Bordodynov I always like your solutions but now you chnaged the input signal wave form. I ask you to explain why and also I want to ask why the former one is no longer good to use. Because remember, the sine wave is, in fact, what I have in lab or at the DDS output! I can't change the hardware to fit your schematics.
You also changed R1 from 50Ω to 51Ω

Thanks

@MisterBill2 sure. I just wanted to make sure it was a mistake!

 

@Bordodynov I always like your solutions but now you chnaged the input signal wave form. I ask you to explain why and also I want to ask why the former one is no longer good to use. Because remember, the sine wave is, in fact, what I have in lab or at the DDS output! I can't change the hardware to fit your schematics.
You also changed R1 from 50Ω to 51Ω

Thanks

@MisterBill2 sure. I just wanted to make sure it was a mistake!

51 ohms is a standard 1% resistor value, while 50 ohms is not. The change was to save money!

 

51 ohms is a standard 1% resistor value, while 50 ohms is not. The change was to save money!

That is only referring to the 51Ω resistor, right?

What about the signal generator changes? I'm not going to have such signal at the input of the amplifier! Why Mr. @Bordodynov changed the signal and added a pulse?

 

That is only referring to the 51Ω resistor, right?

What about the signal generator changes? I'm not going to have such signal at the input of the amplifier! Why Mr. @Bordodynov changed the signal and added a pulse?

Yes, that one. That is the one that you asked about.

The signal generator from post#1 was claimed to output about 1 volt, and the output needed was 2 to 3 volts. For that you need a gain of two to three. Now the DC level of the input sum must keep the output signal from going beyond the linear range of the amplifier, which should not be so very difficult. But now I have a question, which is about the use of this amplified signal. What are you going to do with a signal set in the middle of the Citizens Band channels assignment? Nominally 27.0 to 27.405 Megahertz? It just popped into my head to wonder.