ALS Logic circuit calculations

Thread Starter


Joined Jan 23, 2015
For the ALS logic circuit shown, estimate:
(a) the current IOL
(b) the delay in a 1-to-0 transition at one of the inputs of GATE 1
appearing as an effect at the output of GATE 5.
(c) the total power consumed by the circuit in a quiescent state.

I think this a NAND gate logic circuit, in red I have added the inputs and outputs. I have 2 tables that show typical values of certain logic families. For (a) the low level output according to the table is 4mA for ALS, the low level inputs for gates 2,3 and 4 are 100uA each. Never been asked to estimate these things before although I have heard that it is simple addition.




Joined Mar 31, 2012
The output current rating is the maximum current that the device and source/sink while remaining within the specified output voltage range. It does not tell you what the output current is. Also, note the asterisks next to those last two -- that probably means that there is a footnote giving you additional information. Be sure to look at it and see if it is applicable to your task.

The IL(max) rating tells you that it may require as much as 100 uA to pull the input is pulled LO. The negative sign means that this current is leaving the pin (this is a convention that is related to current convention in circuit simulators). This means that whatever device is driving the input has to be able to sink at least that much current. If that device is driving 10 such inputs, it may have to sink ten times that much current.

Hope that helps.