Advice is needed on FPGA dev board choice for the project

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Vilius_Zalenas

Joined Jul 24, 2022
192
Hi,

I am about to start a new big project that incorporates reading the parallel output of high speed ADC (around 100 MSPS) and sending that data over ethernet. I have some experience with microcontroller programming at a low level and I have just a tiny bit of very basic VHDL knowledge (led blink, 7 segment counter etc...) I know that this project is going to take a lot of time and effort, but I have to start it anyway...

As far as I understand, for the ethernet part, I need that the FPGA have an embedded MCU (FPGA writes data to RAM, and MCU does the further ethernet part after reading that data.) The second big thing is the pure processing power of FPGA chip, since we are talking about real 100 MHz parallel GPIO operations. I did some research on the tech specs and settled on 2 possible dev boards for this project (if you have any better choices, please tell me):

Terasic DE1-SoC

Xilinx PYNQ-Z2

Both of these boards seem to have similar and, theoretically speaking, sufficient capabilities for my project. Xilinx is around 150 euros cheaper at my local supplier... However, former Altera FPGAs offer a more user-friendly programming environment (quartus) which works for all FPGA chips inspite of the chip model or windows version, Xilinx with its ISE NAVIGATOR, VIVADO and other software does not boast that. Overall, those were only very shallow ideas of mine in picking the FPGA dev board, I am still wondering which exact board to choose (reason for this topic). So I am waiting for everything from abstract observations to exact answers on this one. Thank you in advance.
 

drjohsmith

Joined Dec 13, 2021
1,549
If you have an ADC at 100 Msamples per second,
That's at least 100 Mbytes per second of data.
Are yiu aiming to get that off board in real time ?
Your going to heed St least a good giga bit interface for that.
Regarding tools, forget ISE, that only supports end of life slow parts.
Quarts does not support half the older chips, and has a much different ide to the Quarts of 15 years ago. It might have the same name but it's not the same.
Also older tools dont support windows 11, or even w10.
How long do you have and how much money for a board ?
What is your experiance level?
What is your support group like, other students ?
 

MrChips

Joined Oct 2, 2009
34,628
I'm currently doing 50 MHz with standard 12-bit ADC and ARM MCU that are at least 15 years old, no FPGA. If I look around I can probably upgrade to 100 MHz,
 

drjohsmith

Joined Dec 13, 2021
1,549
I'm currently doing 50 MHz with standard 12-bit ADC and ARM MCU that are at least 15 years old, no FPGA. If I look around I can probably upgrade to 100 MHz,
Yes, 50 M times 12 bits, is 75 mbit per second,
Over a 100 M BIT Ethernet , that's possible , but user is looking at at least around 800 Mbit per second , a step up.
 

MrChips

Joined Oct 2, 2009
34,628
Yes, 50 M times 12 bits, is 75 mbit per second,
Over a 100 M BIT Ethernet , that's possible , but user is looking at at least around 800 Mbit per second , a step up.
It depends on what TS wants to do with the data.
In my application, gamma ray spectral analysis, I am processing the data in "real time", 400μs at a time in a circular buffer. The software acquires an energy spectrum, all on the same MCU. The collected data resides in a 16 kB spectrum. The MCU has a total of 192 kB SRAM hence there is lots of memory space.
 

drjohsmith

Joined Dec 13, 2021
1,549
It depends on what TS wants to do with the data.
In my application, gamma ray spectral analysis, I am processing the data in "real time", 400μs at a time in a circular buffer. The software acquires an energy spectrum, all on the same MCU. The collected data resides in a 16 kB spectrum. The MCU has a total of 192 kB SRAM hence there is lots of memory space.
Exactly @MrChips
I have seen another very very similar post on another forum this week
So me wondering.
All I wanted to do is to promote some more thought from the TS ,
As ever ,we await more information from the TS.
 
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