I am using the ADuM422 isolated gate driver (Analog Devices) in my design, and I am repeatedly encountering failures of the IC.

Initially, we suspected that the device was getting damaged due to a surge at startup, since the RBOOT resistor was not included in the original design. Based on this assumption, we incorporated the RBOOT as recommended in the datasheet in an adhoc way.

However, even after adding RBOOT, the issue still persists. The IC continues to fail after power-up sometimes after power up during other testing phases.

One observation is that the 10 V isolated supply current shows a noticeable jump~15 mA to ~40 mA)

Does this current increase suggests that some form of surge or abnormal condition is still present, possibly during startup or switching.Any guidance or suggestions to help us diagnose and resolve this issue.

 

Quite often a failure indicated by a sudden increase in current is caused by overheating a junction, or an excessive voltage breakdown.
Fir CMOS devices sudden failure may also be caused by open-circuited digital inputs.
So my suggestion is to compare the measured operating voltages and currents with the maximum values given in the data sheets for the device.

 

What devices are on the end of the driver outputs, presumably IGBTs - can you show the whole schematic of the bridge circuit please.

One thingy that concerns me is the size of your bootstrap capacitors. What frequency is your PWM, and what is the OUTA - OUTD pulse sequence?

 

Are the IGBTs broken or just he IC?

 

Quite often a failure indicated by a sudden increase in current is caused by overheating a junction, or an excessive voltage breakdown.
Fir CMOS devices sudden failure may also be caused by open-circuited digital inputs.
So my suggestion is to compare the measured operating voltages and currents with the maximum values given in the data sheets for the device.

The voltage operations are well within the limits.

 

What devices are on the end of the driver outputs, presumably IGBTs - can you show the whole schematic of the bridge circuit please.

One thingy that concerns me is the size of your bootstrap capacitors. What frequency is your PWM, and what is the OUTA - OUTD pulse sequence?

The ouput devices are power mosfets ,i have attached the bridge circuit part also.With size did you mean the capacitance or the voltage rating, the frequency of pwm is 100khz.THe pulse delay detwenn OUTA and OUTC is 400ns and between OUTB and OUTD is 100ns. am sorry i dont have specific scopshot of alllfour signals in a single frame.

please note that the transformer shown in the schematic is custom wound and the the ic's are gettiing damaged even when the transformers are not placed.
And there have been also events where ic was fine until at some point it started to stop working.

 

Are the IGBTs broken or just he IC?

The power devices used are MOSFETs (not IGBTs), and based on current observations they initially appeared to be intact. However, during one debugging iteration, the faulty gate-driver IC was operated for an extended duration. After this stress condition, both high-side MOSFETs were observed to exhibit gate-to-drain conductance

 

both high-side MOSFETs were observed to exhibit gate-to-drain conductance

I have hade G-D shorts in MOSFETs that killed many other parts. It is hard to know which broke first.

 

ic's are gettiing damaged even when the transformers are not placed.

Interesting. That removes many things.

THe pulse delay detwenn OUTA and OUTC is 400ns and between OUTB and OUTD is 100ns.

I worry about the delay between A and B, also C and D. It is critical, when you have two MOSFETs across the supply, that you do not have both a top and a bottom transistor on at the same time. Can you double the "delay" and see if that helps?

Please send a picture of the PCB. The length of wire between the IC and MOSFET is important. Ringing can cause a MOSFET to turn on when you think it is off.

 

Yes, as @ronsimpson says, gate ringing was my first thought and is still the most likely. Depending on layout, those 1ohm gate resistors may not provide enough damping. I don't think its overheating of the gate driver; based on those MOSFETs Qc and 100kHz switching the driver losses are around 126mW, plus it has thermal shutdown built in. Although the driver gate supply is rated for 35v and your bridge VDD is 25 - 42v it could be that you have high parasitic inductances due to the layout, causing voltage switching spikes that take GNDA sufficiently negative wrt the gate, giving punch-through and over-stressing the driver. This could well be exacerbated by shoot-through. Issues like this can be hard to track down.

 

Please send a picture of the PCB. The length of wire between the IC and MOSFET is important. Ringing can cause a MOSFET to turn on when you think it is off.

Sure i have attached the pcb layout part. The track in yellow are the wire(VOA,VOB,VOC,VOD).

 

Interesting. That removes many things.

I worry about the delay between A and B, also C and D. It is critical, when you have two MOSFETs across the supply, that you do not have both a top and a bottom transistor on at the same time. Can you double the "delay" and see if that helps?

Thank you for pointing this out. We fully agree that the delay between A–B and C–D is critical, especially to avoid any shoot-through when the top and bottom MOSFETs are across the supply.
At this stage, since the number of available ICs is limited, we are trying to narrow down and clearly identify the root cause before making further change.
There is one more point that there was situation in the past where damaged even before placing the mosfet. At some iterations in works at some the IC fails.

 

I have hade G-D shorts in MOSFETs that killed many other parts. It is hard to know which broke first.

Do you know under what conditions an issue can occur between the gate and drain of a semiconductor device? So that it shows G-D shorts.

 

Sure i have attached the pcb layout part. The track in yellow are the wire(VOA,VOB,VOC,VOD).

Unless I'm going blind, I don't see any gate resistors in that PCB layout?

 

Yes, as @ronsimpson says, gate ringing was my first thought and is still the most likely. Depending on layout, those 1ohm gate resistors may not provide enough damping. I don't think its overheating of the gate driver; based on those MOSFETs Qc and 100kHz switching the driver losses are around 126mW, plus it has thermal shutdown built in. Although the driver gate supply is rated for 35v and your bridge VDD is 25 - 42v it could be that you have high parasitic inductances due to the layout, causing voltage switching spikes that take GNDA sufficiently negative wrt the gate, giving punch-through and over-stressing the driver. This could well be exacerbated by shoot-through. Issues like this can be hard to track down.

Thank you for this detailed insight. We would also like to mention that we have previously seen cases where the gate driver was damaged even before the MOSFETs were populated. In some iterations the circuit operates as expected, while in others the driver IC fails.
We agree that problems like this can be difficult to track down, especially when parasitic inductances and potential shoot-through are involved. Could you please suggest any specific measurements, layout checks, or experiments that we could perform to help narrow down the root cause of the issue?

 

Unless I'm going blind, I don't see any gate resistors in that PCB layout?

the resistors are on the bottom side.Am marking it with green for your reference.

 

What are the width of those gate traces? What's the layer stack-up on this board?

 

What are the width of those gate traces? What's the layer stack-up on this board?

Trace width is 10mils and i have attached the stack - up.

 

OK. I think there are multiple issues with this board.

You need some bulk capacitance on VDDB as per VDDA. VDDA needs a small eg 100n capacitor alongside the 10u, as per datasheet. Consider changing the 1N4148 for a schottky or fast-recovery device.

The gate traces should ideally be of similar length and much shorter and thicker. That long thin (0.25mm) trace from VOC is about 100-130nH of inductance, the short one about 30-50nH. Making them as thick as possible will help reduce ringing. Similarly the traces from the driver GNDA pin to their respective VOX_Y_GND traces need to be of a similar width.

The gate traces also run parallel to the VOA_B_GND and VOC_D_GND which have 10A transients. This is going to induce some undesired voltage into the gate traces, possibly sufficient to partially turn on a MOSFET that should be off. Ideally the drivers should be below the MOSFETs so the gate traces run at right angles to the power lines. Alternately use a 4-layer board with an internal ground plane.

Here's a sanitized snippet of one I did a while back using similar devices:

 

sreedev27 I have been working at 10x the speed you are. So what I say is colored by using faster transistors.
Irving and I are concerned with the thin traces in several places. The Gate trace and the return path VOA_B_GND are very thin.
I run 5 to 15 amps on the Gate. I use traces as wide as the pads on the Gare Driver.
I also worry about the long lengths.

I see Irving just posted.