I need the simplest circuit that can be used to control a logic line, using that same line as a trigger. In other words after logic is applied to line through, when state is changed, i need an adjustable millisecond delay before line through can be energized again.

Time 5-500 milliseconds

Thanks
CuznIt

 

In other words after logic is applied to line through, when state is changed,

So you want the delay when the logic state goes high and and also when the logic state goes low?

 

You haven't replied.
Do you still need the delay function?

 

Plus, in addition to crutschow’s question (do you need a delay after both leading and trailing edges, you mention a time of 5-500ms.

Is this an adjustable delay? Or is a range for which the delay must occur?

 

Just need the delay once the state is achieved and then changes. once the state is achieved it can be immediate and stay in as long as necessary, just once it drops outs or the state changes a time delay is needed before it can be re-achieved. so I guess only on the tail. it does need to be adjustable 5-500 milliseconds, this maybe to broad of a range, but as close to this as possible. sorry about slow response, on the road most of the time, only certain times I am able to access.

 

Still not completely clear what you want.
Below is the LTspice simulation of a circuit that (I think) should work for you.
It delays the change of the output by the one-shot time so no change can occur in a shorter period than that.

The circuit uses two 4093 Schmitt-trigger NAND gate packages, and one 4066 transmission gate.
The circuit may appear a bit complicated, but I couldn't come up with a simpler one to do that function.

U2 is configured as an XOR edge pulse generator to trigger the one-shot (U1a and U1b circuit.) on both the rising and falling edge of the input signal.

The one-shot signal inhibits the transfer of the signal through the 4066 gate to the latch (U1c and U1d).
It's time can be adjusted from about 5ms to over 500ms by pot U1.

The latch maintains the last input value until a new one comes through the 4066.

Note on the simulation that the output signal (red trace) changes immediately on the first edge of the input signal change (green trace) but the next change does not occur until after the one-shot (blue trace) has timed out.

Does that appear to do what you want?

The function could also likely be done with a single, small microprocessor.

 

@crutschow

As far as I understand his requirement, he needs to detect the trailing edge of the signal and inhibit detection of the signal for “some” period of time.

“Some” is in quotes, because the duration of the delay needs to be adjustable from 5ms to 500ms.

So if we use a trailing edge detector that triggers a one-shot, with a variable delay, to provide an inhibit signal, that’s a start.

 

he needs to detect the trailing edge of the signal

How do you define "trailing edge"?
I think he's interested in when the transitions of the signal occur.

 

How do you define "trailing edge"?
I think he's interested in when the transitions of the signal occur.

He specifically said

once the state is achieved it can be immediate and stay in as long as necessary, just once it drops outs or the state changes a time delay is needed before it can be re-achieved. so I guess only on the tail.

 

I think we are all getting on the same page. the reason i was using the tail as detect is that activity occuring on the input while in a time out state would have no effect. what I see above is much the same thing i had came up with. I was just wondering if i had missed something to make it even simpler. Yes all can be achieved by using a microprocessor, but I am looking for simple, durable, what you see is what you get... "to infinity and beyond..."