Hello friends. Currently, I am learning the design of an AC-DC converter for low-voltage applications. The topology with the output voltage regulation function from attached file1 is shown below.

And the waveforms of the voltage across Vi and the current flowing through L in the steady state are shown below.


I conduct the simulation based on this topology without the output voltage regulation function in the LTSpice, and the schematic is shown below. However, I cannot get similar waveforms like those in file1.


I have attached the simulation file. Hope someone can help me find the problem. Thanks.

 

I conduct the simulation based on this topology without the output voltage regulation function in the LTSpice, and the schematic is shown below. However, I cannot get similar waveforms like those in file1.

They present ideal plot, without inductance / FETs & diodes capacitance ringing.