Hello everyone. I tried practicing creating up down counters using the J/K FF. I've been using the Synchronized Clock with an up down counter and the simulation seems to be successful based on this circuit on the image

However, in the actual circuit in a breadboard using a 74LS73 IC, a 555 timer with the capacitor and resistors, and an 74LS86, it somehow lags and sometimes refuses to count . For example, after it successfully counts up to 3, it doesn't go immediately to 0 and instead goes to 2. When it counts down to 0, it refuses to go back to 3 and vice versa. It still counts up and down based on the switch but I don't know what's the problem with this.

The asynchronous 3 bit down D counter works very well in the breadboard. I wonder what's causing this? An IC problem perhaps?

 

welcome to the real world,

in this one, voltages, noise, power , ground, time all matter,
get one wrong, circuit fails, some times 'randomly'.

out with the scope me thinks, see what the real circuit is doing

 

Make sure the input pulses are good. How do you actually generate them?

 

What have you done with the 74LS73 /CLR inputs on pins 2 and 6?
Make sure you connect them to Vcc.

 

What have you done with the 74LS73 /CLR inputs on pins 2 and 6?
Make sure you connect them to Vcc.

I was going to connect more gates to it after I build the full circuit that up/down counts to 9 and 0. I'm trying to imitate the circuit on this forum

https://forum.allaboutcircuits.com/threads/jk-flip-flops-up-down-counter-from-0-to-9.101546/

 

I was going to connect more gates to it after I build the full circuit that up/down counts to 9 and 0.

So, in the meantime, connect pins 2 and 6 to Vcc.

 

View attachment 122046

Hello everyone. I tried practicing creating up down counters using the J/K FF. I've been using the Synchronized Clock with an up down counter and the simulation seems to be successful based on this circuit on the image

However, in the actual circuit in a breadboard using a 74LS73 IC, a 555 timer with the capacitor and resistors, and an 74LS86, it somehow lags and sometimes refuses to count . For example, after it successfully counts up to 3, it doesn't go immediately to 0 and instead goes to 2. When it counts down to 0, it refuses to go back to 3 and vice versa. It still counts up and down based on the switch but I don't know what's the problem with this.

The asynchronous 3 bit down D counter works very well in the breadboard. I wonder what's causing this? An IC problem perhaps?

Here's your circuit, and It simulates nicely, so I think you either have a wiring problem on your breadboard or your UP-DOWN control line isn't being exercised properly. The LS73 is triggered by low-going clocks, so it might also be possible that a metastability problem exists if you're thinking that the '73 is positive edge triggered and your UP/DOWN line is switching on low-going clock edges.

Also, even though you're working with a 74LS part, make sure your RESET pins are connected to +5V.

 

Please show the schematic for the circuit as you have actually constructed it, including ALL components and ALL connections.

 

Please show the schematic for the circuit as you have actually constructed it, including ALL components and ALL connections.

https://forum.allaboutcircuits.com/attachments/up-dn-0-9-jk-units-or-seconds-pdf.73392/

I'm imitating this circuit.

So, in the meantime, connect pins 2 and 6 to Vcc.

I did, thanks for the advice. it works flawlessly


My new problem is when I connect the reset wires in their proper places to reset from 9 to 0 and 0 to 9. Down counter doesn't work after it reaches 0 and the up counter counts to 9 and returns to 2.


Based on the diagram, there are nodes at R2 & R4 from the reset NAND Gate ? Whenever I do that, it stops counting. I followed this diagram instead

where R0 is connected to all the reset pins of the two ICs. I have no idea where S9 goes since there's no such thing on the 74LS73

The circuit works flawlessly when the reset pins are connected at VCC. It doesn't however when the pins are connected to R0