Hi,

I've simulated the attached circuit and noticed it violates the absolute maximum input rating of -0.5V to Vcc + 0.5V. I've seen this circuit with a CD4070 which has similar maximum ratings but I have a 74HC86 and so thought I might use that.

Will this oscillator self-destruct or is it fine somehow?

 

Hi,

I've simulated the attached circuit and noticed it violates the absolute maximum input rating of -0.5V to Vcc + 0.5V. I've seen this circuit with a CD4070 which has similar maximum ratings but I have a 74HC86 and so thought I might use that.

Will this oscillator self-destruct or is it fine somehow?

Almost all modern logic ICs have input protection diodes that clamp the inputs (and outputs) at a diode drop away from the rails. Many simulation models do not include them (they slow down the simulation too much in large designs). Your should be fine, but you can always add external protection diodes. In either case, if the diodes conduct it may affect your timing.

 

Someone may correct me later, but I believe in LTSpice the logic gate models are behavioral only.

 

The input protection diodes will flat top the waveform at VCC+0.7V and GND - 0.7V.
This will shift the frequency some. You can add diodes to the inputs and try it. 1N4148

 

All those oscillator circuits are violating a digital gate as a kind of analog amplifier. In the data sheet there is also mentioned a max. input transition time of 500 ns @ 4.5 V Vdd. Your transition time is 5 us!

 

Thank you gentlemen.
The actual built circuit doesn't oscillate but trouble shooting isn't complete yet. Maybe the chip is bad as it has been stored poorly. But there are some things to try first.

In the data sheet there is also mentioned a max. input transition time of 500 ns @ 4.5 V Vdd. Your transition time is 5 us!

Hmm, I see what you mean. That would severely restrict the lowest frequency one could get out of this.

Edit: with some fiddling it works fine now. The input protection is clearly visible on the scope.

 

The 74HC86 might "work", but not reliably, or might consume more power.
You can use schmitt trigger devices for slow rise times, like the 74HC14, instead of the 74HC86.

 

It doesn't need a Schmitt trigger because there is positive feedback from U1.

 

All those oscillator circuits are violating a digital gate as a kind of analog amplifier. In the data sheet there is also mentioned a max. input transition time of 500 ns @ 4.5 V Vdd. Your transition time is 5 us!

Linear operation is accepted by the manufacturers:
see https://www.google.com/url?sa=t&sou...oQFnoECBkQAQ&usg=AOvVaw2rl80e6M9qXFVNf6BU2xUM

 

It doesn't need a Schmitt trigger because there is positive feedback from U1.

Only one device is needed.

 

Hi,

I've simulated the attached circuit and noticed it violates the absolute maximum input rating of -0.5V to Vcc + 0.5V. I've seen this circuit with a CD4070 which has similar maximum ratings but I have a 74HC86 and so thought I might use that.

Will this oscillator self-destruct or is it fine somehow?

The HC part has clamp diodes to Vcc and ground, so it won't make the waveforms that you show. Clamping won't hurt the part.

John

 

The 74HC86 might "work", but not reliably, or might consume more power.
You can use schmitt trigger devices for slow rise times, like the 74HC14, instead of the 74HC86.

The 74HC14 also consumes power when its inputs are not at Vdd or Vss, just like any other CMOS gate.

 

The thing is I need one XOR gate and a good enough oscillator so it would be nice if I can use the other XOR gates and not require another package for the oscillator. And from the responses it looks like this will be fine. Thanks everyone.

 

The thing is I need one XOR gate and a good enough oscillator so it would be nice if I can use the other XOR gates and not require another package for the oscillator. And from the responses it looks like this will be fine. Thanks everyone.

Yes. it's a very standard ring-of-three oscillator. (It's a ring of three, because the three are three inverters, and an XOR gate with its spare input tied low is equivalent to two inverters)

 

At least the "4000" series CMOS devices are rated for up to 15 volts, so if you are using 5 volts, even a 5 volt over-shhot will not be a problem.

 

At least the "4000" series CMOS devices are rated for up to 15 volts, so if you are using 5 volts, even a 5 volt over-shhot will not be a problem.

The Absolute Max Input Spec for 4000 series devices is Vdd + 0.5 V.

If you are powering the chip from 5 V and you apply 10 V to the input, you'll smoke the protection devices, since the first stage are essentially diodes to the supply pins. Brief transients are a more complicated situation as it largely depends on how much heat is dumped into protection circuit, though electromigration effects could also come into play eventually.

 

To be very conservative, it would be simple to add a resistor in series with that cap. BUT consider that there are already series resistors in series with it, any current is alreatdy limited. 10K in series is the lower resistance value. ALSO, I am questioning just where the calculated voltage (redtrace) is actually coming from. I doubt that it is a zero-impedance source.

 

At least the "4000" series CMOS devices are rated for up to 15 volts, so if you are using 5 volts, even a 5 volt over-shhot will not be a problem.

I can't remember @MisterBill2
But I thought the 15v was what the kax power voltage could be.
If the power is say 5v, what does the data sheet say the max input voltage can be ? My bet is under Vcc + 1v .

 

As long as you limit the input current to the max rating (input clamp current below) with a resistor there is no problem:
The minimum resistor value would be the applied voltage minus the supply voltage divided by the max current.

 

what does the data sheet say the max input voltage can be ?

The input voltage range is one diode drop below ground to one diode drop above supply.
As pointed out by crutschow the diodes are only rated for 20mA.