Sounds like an interesting task.
What's your progress so far in doing in the task
Since this appears to be homework, we don't do that for you.

 

IMHO there is not really an accurate correspondence between ladder logic, where all rungs are executed simultaneously in parallel, and programming languages which are executed sequentially. I suppose if there was a language where you could represent the parallel operation of ladder logic it might make more sense.

 

MOD NOTE: Moved to Homework Help.

 

IMHO there is not really an accurate correspondence between ladder logic, where all rungs are executed simultaneously in parallel, and programming languages which are executed sequentially. I suppose if there was a language where you could represent the parallel operation of ladder logic it might make more sense.

There are such languages -- they are called hardware description languages. The two most notable are Verilog and VHDL.

 

There are such languages -- they are called hardware description languages. The two most notable are Verilog and VHDL.

You could likely use the CLB for the OP design. The device config software uses old school schematic hardware design to synthesize HDL.
https://www.microchip.com/en-us/pro...croprocessors/8-bit-mcus/pic-mcus/pic16f13145

https://onlinedocs.microchip.com/ox...UID-A838B6F7-9A78-40D5-9E96-3404F3A6E032.html
A pretty low end way to get started with FPGA design for something like a hardware neopixels serial modulator on a PIC16 without DMA

 

There are such languages -- they are called hardware description languages. The two most notable are Verilog and VHDL.

Never had the necessity or opportunity to use either one. More's the pity.

 

Never had the necessity or opportunity to use either one. More's the pity.

As with all things, there's a learning curve. Part of that is making the mental leap to keeping in mind that all of the code is running concurrently. Pure programmers struggle with that a lot more than people with a decent degree of hardware experience.

 

IMHO there is not really an accurate correspondence between ladder logic, where all rungs are executed simultaneously in parallel, and programming languages which are executed sequentially. I suppose if there was a language where you could represent the parallel operation of ladder logic it might make more sense.

Ladder logic as it pertains to PLC's etc, operate sequentially, the manuf. usually issue a typical scan time for a certain block size of code.
Many PLC.s scan the I/O, plot the status of each function and store the result (output) at the end of the scan in a output table representing, all I/O during that last scan.

To the O/P, what programming languages are you familiar with? If any?

 

As with all things, there's a learning curve. Part of that is making the mental leap to keeping in mind that all of the code is running concurrently. Pure programmers struggle with that a lot more than people with a decent degree of hardware experience.

I am certainly familiar with ladder logic design and how the PLC had to emulate that function as closely as possible.

 

@vishnuvardhan17r This kind of logic is commonly known as Boolean logic,, most of the PLC's that use this form, also have the capability of displaying this graphical listing in Boolean notation.
In the 1800's when George Boole came up with this type of logic, there was virtually no use for it at the time, until the advent of computers where it is now used extensively.

 

@vishnuvardhan17r This kind of logic is commonly known as Boolean logic,, most of the PLC's that use this form, also have the capability of displaying this graphical listing in Boolean notation.
In the 1800's when George Boole came up with this type of logic, there was virtually no use for it at the time, until the advent of computers where it is now used extensively.

Not quite accurate, since there were electro-mechanical relay machines (Tores, Leonardo ca. 1920) that were constructed before the first electronic computers (ENIAC ca. 1945). The first PLC debuted in the 1960's.

 

Not quite accurate, since there were electro-mechanical relay machines (Tores, Leonardo ca. 1920) that were constructed before the first electronic computers (ENIAC ca. 1945). The first PLC debuted in the 1960's.

+1

Shannon found that one could directly translate a system of equations of propositional logic into a physical circuit of relay switches, through a rote procedure. “In fact,” he concluded, “any operation that can be completely described in a finite number of steps using the words if, or, and, etc. can be done automatically with relays.”13 For example, two relay-controlled switches wired in series formed a logical and – current would flow through the main wire only if both electromagnet circuits were activated to close the switches. Likewise two relays in parallel formed an or – current would flow through the main circuit if either electromagnet were activated. The outputs of such logic circuits could, in turn, control the electromagnets of other relays, to make more complex logical operations, such as (A and B) or (C and D).

https://www.cs.virginia.edu/~evans/greatworks/shannon38.pdf
Shannon A Symbolic Analysis of Relay and Switching Circuits