555 PWM Calculations

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Hi,

I'm having some trouble calculating the range of component values for use with this (TLC)555 PWM circuit:

Screenshot_20220315-132256.png

Let us say that Clock Input is another TLC555 operating in astable mode, Modulation Input is an LM393, Vin = 1-2.7V and the desired minimum frequency from the astable 555 is 40kHz.

1) How are component values for the PWM 555 chosen in relation to the astable 555 so that the min-max duty cycle on the output is selectable? Since this is driving a boost converter, only a select range is usable.

2) What component values are for best for the astable 555? (Duty cycle? 40kHz OR 400kHz etc. if the rest of my circuit is negligibly affected?

3) Note A in the image talks about direct or capacitive coupling.. I'd like more on this.

Regards,
Mark
 

crutschow

Joined Mar 14, 2008
38,515
Here's the plot in the TLC555 data sheet that shows the relation between duty-cycle, clock period, and control voltage.
So for your input control voltage range you likely would want the astable clock period to be somewhere between 1RC and 2.5RC but closer to 1RC of the modulator 555 RA-C timing values.

The astable frequency you want depends upon the requirements of the boost converter.

Note that the astable clock trigger should have at least a 98% duty-cycle (output high for 98% of the period).

For your application in a DC boost control loop (as I understand your use of this circuit) you need DC coupling, not AC, for the modulating input.

All this make sense?

1647382150141.png
 
Last edited:

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Here's the plot in the TLC555 data sheet that shows the relation between duty-cycle, clock period, and control voltage.
So for your input control voltage range you likely would want the astable clock period to be somewhere between 1RC and 2.5RC but closer to 1RC of the modulator 555 RA-C timing values.

The astable frequency you want depends upon the requirements of the boost converter.

Note that the astable clock trigger should have at least a 98% duty-cycle (output high for 98% of the period).

For your application in a DC boost control loop (as I understand your use of this circuit) you need DC coupling, not AC, for the modulating input.

All this make sense?

View attachment 262846
Thanks, it took me a while to absorb the graph. Increasing the duty from 66 to 98% significantly improved the output. I can't seem to find a guide for the TLC555 that goes into more detail regarding my application. Is the TLC555 really a drop in replacement for NE555? I have noted differences between the two with the timing.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Output of what?
Not totally.
The TLC555 is a CMOS device and the NE555 is BJT device, so there are some subtle differences in the operation (such as the output pulse high voltage value).
The output of the PWM circuit itself and the resulting boost circuit. Concerning the mathematics:

For the astable 555 I have:

- selected a period of 700uS given by the formula: period = 0.693(Ra + 2Rb)C.
- selected a duty cycle of 99% given by the formula: duty = 1 - (Rb / Ra + 2Rb)

The time constant of the PWM 555 should then be 280-700uS to comply with what's known on the graph for selectivity. The greater the ratio between the period and time constant, the more exponential the slope becomes.

Good so far?
 

MrSalts

Joined Apr 2, 2020
2,767
The output of the PWM circuit itself and the resulting boost circuit. Concerning the mathematics:

For the astable 555 I have:

- selected a period of 700uS given by the formula: period = 0.693(Ra + 2Rb)C.
- selected a duty cycle of 99% given by the formula: duty = 1 - (Rb / Ra + 2Rb)

The time constant of the PWM 555 should then be 280-700uS to comply with what's known on the graph for selectivity. The greater the ratio between the period and time constant, the more exponential the slope becomes.

Good so far?
Your equations are right for only a capacitor connected to control pin (pin 5). If you change the "control voltage" you'll get some different values - see graph on post 2. Control voltage setting (pin 5) is on x-axis.
 

Thread Starter

k1ng 1337

Joined Sep 11, 2020
1,038
Your equations are right for only a capacitor connected to control pin (pin 5). If you change the "control voltage" you'll get some different values - see graph on post 2. Control voltage setting (pin 5) is on x-axis.
Can you elaborate? I was able to produce the black and red traces on the graph by varying the time constant from 280-700uS which solved my problem. The datasheet makes a note that the expressions I've used are incomplete. Is this what you are referring to?
 

Ian0

Joined Aug 7, 2020
13,132
Not wishing to hijack the thread, but does anyone know the limits of operation for pin 5? It doesn’t seem to be in the datasheet, all is says the minimum and maximum voltage on pin 5 with nothing connected to it. It doesn’t say how far it can be driven and it still work i.e. the common mode inout voltage of the comparators.
Assuming that a bipolar 555 is internally an LM393 with a set-reset latch added, then it should work down to 0V, but not above Vcc-1.3V, and I don’t know what it would be for the CMOS parts.
 

Ian0

Joined Aug 7, 2020
13,132
Not quite as much as an LM393 as I thought, but the trigger comparator definitely is.
I wonder if the combination of NPN and PNP comparators was done deliberately to cancel out bias currents.
 
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