If the collector-base terminal of the bjt is reverse biased then how is the collector current positive? Also what is the voltage of Vbc at which the bjt becomes saturated?

 

These sound like homework questions? Are they?

 

No they aren't. Since the answer is probably given in my textbook it is not a homework question. I am really slow so I asked.

 

A fundamental theorem of circuits is that the currents going into and out of a node must add up to zero. So we start with an assumption that all three currents, Ic, Ib, and Ie are all positive and flow into the device. We then proceed with theory and experiment to discover that our initial assumption was wrong and Ie must be negative for the sum of the three currents to add up to zero. So we allow Ie to be negative but we draw it flowing out of the device. The sum of the three currents is zero and Ie = Ic + Ib

Saturation occurs when Vbe is greater than about 0.7 V and Vce drops to less than 0.2V

 

If the collector-base terminal of the bjt is reverse biased then how is the collector current positive? Also what is the voltage of Vbc at which the bjt becomes saturated?

Do you think you could get answers quicker if you just pull out a breadboard, transistor and resistors?

 

Do you think you could get answers quicker if you just pull out a breadboard, transistor and resistors?

That might shed some light onto the second question, but it wouldn't do much to help her understand the first.

 

If the collector-base terminal of the bjt is reverse biased then how is the collector current positive? Also what is the voltage of Vbc at which the bjt becomes saturated?

Because a BJT transistor is not just two diodes glued together. This is a common misconception that people new to transistors have and it is a very reasonable misconception that is how the usual pictures make it look and, indeed, under specific conditions that is how it behaves. But when operating in the active mode, the base-emitter junction (which behaves very diode-like) allows charge carriers to enter the very thin base region. The presence of these charge carriers in the region effectively makes a channel that allows charge to flow from collector to emitter through the base region. That's a very simplistic description, but hopefully it gets the idea across.

Another point to keep in mind is that even though the collector current is positive, there is still no collector-base current. Even as the collector-base voltage becomes slightly forward biased (say 0.4 V to 0.4 V) there is still no appreciable current (just as there wouldn't be for a normal silicon diode). As the collector-base voltage starts getting forward biased enough such that current would start flowing, the channel effect described above approaches its limits and you end up with an equilibrium where the collector-emitter voltage can't get much lower. This is the saturation voltage and, for small silicon transistors, is usually in the range of two or three hundred millivolts. Thus the Vbc in saturation is this much less than the "normal" forward diode voltage.

 

Thus the Vbc in saturation is this much less than the "normal" forward diode voltage.

But never enough to forward bias the B-C junction?

 

But never enough to forward bias the B-C junction?

If Vcesat = 0.2 V and Vbe = 0.7 V, then Vbc = 0.5 V (we are talking NPN silicon transistors here). Yes, this is "forward biased", but by so little that even if it were a diode the current would be very low. With a Vcesat of 0.2 V, the diode current in the base-collector junction would be more than three orders of magnitude less than the diode current in base-emitter junction. When you then add in the transistor current gain, even in saturation, any nominal base-collector current that is superimposed on the collector-emitter current is completely lost in the noise.

Now, if you tie the collector to a voltage level that is at or below the emitter, then you will get current flowing from base to collector. In fact, if you reverse the collector and emitter leads of a transistor you still have an NPN transistor and it will behave like an NPN transistor, just with pretty poor specs.