Two FETs arranged one above another, specifically with the source of an N-channel FET (above) connected to the drain of a P-channel FET (below). The drain of the N-channel FET is connected to VDD and the source of the P-channel FET is connected, via a current source, to ground. Separate inputs are provided to the gate of each FET. The output is at the node connecting the two FETs. It's neither exactly a cascode nor an inverter, but more like the latter. Is this a common configuration and does it have a name?
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