Voltage level shifting of Signal After passing through capacitive isolation.

Thread Starter

Alex_Khan

Joined May 27, 2020
25
Hello,
May be it simple question ! but i would need the technical reason Why it happen.
Problem: I am designing signal isolation circuit using capacitive coupling technique using Cadence , CMOS 0.35micro-meter technology . For that i modulate the information signal using frequency modulator on modulator side, then pass it across capacitor (as isolation barrier) and finally demodualte it on demodulator side[as shown in figure].
When i examin modulated signal acorss isolation coupling capacitor , it level is shifted. Before it is between (0-5V) but on other side of capacitor it's now between (-3.4 and 1.6) as shown in figure.
I would like to know that why voltage level is shifted on other side of capaciotr.


CC.jpg cap_res.PNG
 

Thread Starter

Alex_Khan

Joined May 27, 2020
25
What reference point is used for each measurement?
What is the relationship between those two reference points?
The refrence point is from 0 to 5 V(which can be seen on y-axis of (red) signal ). And i expect the (green) signal should be between 0_5V after passing through capacitor, however its between -3.4 to 1.6V.
 

Papabravo

Joined Feb 24, 2006
13,726
No, that is not what I meant. To make a measurement with a scope you must have two connection points, one is with the probe tip and the other is with a ground clip. Where is the ground clip connected on your diagram? Are the "grounds" on either side of the capacitor supposed to be the same or are they different? Where does the ground clip from the scope connect to?
 

Thread Starter

Alex_Khan

Joined May 27, 2020
25
No, that is not what I meant. To make a measurement with a scope you must have two connection points, one is with the probe tip and the other is with a ground clip. Where is the ground clip connected on your diagram? Are the "grounds" on either side of the capacitor supposed to be the same or are they different? Where does the ground clip from the scope connect to?
Thanks for your response.
I am implementing it on CADENCE software, so its a simulation results , not on hardware based result.
 

Papabravo

Joined Feb 24, 2006
13,726
Thanks for your response.
I am implementing it on CADENCE software, so its a simulation results , not on hardware based result.
Even a simulator has reference points that voltages are measured with respect to. It wouldn't be much of a simulator if it didn't. Answer the question.
 

crutschow

Joined Mar 14, 2008
24,967
The average (DC) voltage at the output of a capacitor is determined by what it is connected to.
Obviously, since it's a capacitor, it cannot transfer the 2.5V average DC value of the input voltage.
So what is the output connected to (inside the block diagram)?
 

andrewmm

Joined Feb 25, 2011
323
As an example, try changing the wave form your sending through the AC coupling capacitor.
Try a square wave, vary it from 1 high , 9 low, to 9 high, 1 low, see what happens after the capacitor.
 

Papabravo

Joined Feb 24, 2006
13,726
The simulator refrence voltage is 0-5v .
You still don't understand. In a simulator or a real circuit there are one or more reference points which are single values. A reference point cannot be a range; only a person who did not understand the question would respond twice with a voltage range. ALL voltages in a circuit are given with respect to discrete and usually constant reference voltage.
 

Thread Starter

Alex_Khan

Joined May 27, 2020
25
You still don't understand. In a simulator or a real circuit there are one or more reference points which are single values. A reference point cannot be a range; only a person who did not understand the question would respond twice with a voltage range. ALL voltages in a circuit are given with respect to discrete and usually constant reference voltage.
Sorry for misunderstanding, The refrence voltage is 5V.
 

Papabravo

Joined Feb 24, 2006
13,726
Sorry for misunderstanding, The refrence voltage is 5V.
So are you saying that with +5V as the reference all the measurements should be negative. Sorry, but you clearly don't understand what you are doing.
Why are you AC coupling into a single supply circuit? That seems like a pretty nonsensical thing to do.
 

crutschow

Joined Mar 14, 2008
24,967
You show a 2Meg and a 249k ohm resistors biasing the capacitor output (amp input) from 5V, which should give an amplifier input bias voltage of 0.553V, but your simulation shows 1.6V (to output ground?), so that is a significant discrepancy between the schematic and the simulation.
And that bias voltage cannot exceed about 0.7V since that is a BJT base-emitter junction which looks like a forward biased diode.

But whatever that bias voltage is, that will be the start ((zero point) voltage for the 0-5V input signal, as your simulation shows.
 

Alec_t

Joined Sep 17, 2013
11,291
This may help to explain things in your setup.

Isolation.png

The modulator output is measured between a and Ref1. The demodulator input is measured between b and Ground (Ground is Ref2.
Note that the voltage at b is affected by the current through R1, R2 and the transistor base junction. Hence the demodulator input waveform is offset from the modulator output waveform.
 

Papabravo

Joined Feb 24, 2006
13,726
For input to output isolation, as the title infers.
It's a common isolation technique in integrated circuits.
I understand that part, but that means any excursions below ground will be useless. Are the grounds also isolated and does the "demodulator" circuit make any sense?
 

Thread Starter

Alex_Khan

Joined May 27, 2020
25
You show a 2Meg and a 249k ohm resistors biasing the capacitor output (amp input) from 5V, which should give an amplifier input bias voltage of 0.553V, but your simulation shows 1.6V (to output ground?), so that is a significant discrepancy between the schematic and the simulation.
And that bias voltage cannot exceed about 0.7V since that is a BJT base-emitter junction which looks like a forward biased diode.

But whatever that bias voltage is, that will be the start ((zero point) voltage for the 0-5V input signal, as your simulation shows.
Thanks for your response . Moreover, i used NMOS transistor with Vth (threshold voltage) of almost 0.5V. I am implementing it on integrated circuit , so thats why i use CMOS technology instead of BJT.
 
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