Trying to reproduce an analog circuit using LM324 to have at output 100Hz squarewave 5% duty cycle from 230Vac mains frequency. The circuit has to be in sync with it. Picture and LTSpice simulation are attached.
Input is taken from a 230V - 24Vac transformer.
Quick analysis:
36Vpp AC is divided by 10 and applied to the non inverting input of U1 circuit. with Vin1- connected to ground it is essentially a zero cross detection circuit in op-amp used in open loop configuration as a comparator.
Vout is the result of every zero transition of the sinusoidal input.
It should show a 50Hz 50% duty cycle output square wave in sync with the mains frequency (positive cycle 50% ON - negative cycle 50% OFF) but this doesn't happen. It happens with other one ADA4522 (UPPER PLOT).
LTSpice simulation (attached) shows instead in lower plot LM324 (Vout1 in green) a 100Hz 5% duty-cycle square wave in sync with the mains frequency.
After snooping around this forum on similare threads I found that this circuit was built around an opamp LM324 with maybe input latched up.
Recap:
Since U1 has Vss connected to ground its output cannot swing negatively. only between 0 and +18Vcc.
OPAMP LM324:
INPUT POSITIVE WAVEFORM:
Vin+ > Vin- => Vout=Vcc.
ZERO APPROACHING PHASE:
Now Vin+ < Vin- (0V) => Vout=0.
INPUT NEGATIVE WAVEFORM:
Once Vin+ goes below -0,6V Vcm is -0,3V right? LM324 datasheet says: The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V).
What happens with more negative part of sinewave applied to the input?
Why does Vout immediately goes positive again?
And it goes, even in simulation than in real circuit. at least with the old LM324.
Does during latch up the non inverting input behaves as an inverting one making the OPAMP output going high again?
The strange was that using in lab the newer LM324 (revisionB - datasheet minimum input common mode voltage is Vss=0V) or other one (ADA4522 see simulation file) was not presenting such a behaviour.
Please help me to understand.
Thank You so much, as always
Input is taken from a 230V - 24Vac transformer.
Quick analysis:
36Vpp AC is divided by 10 and applied to the non inverting input of U1 circuit. with Vin1- connected to ground it is essentially a zero cross detection circuit in op-amp used in open loop configuration as a comparator.
Vout is the result of every zero transition of the sinusoidal input.
It should show a 50Hz 50% duty cycle output square wave in sync with the mains frequency (positive cycle 50% ON - negative cycle 50% OFF) but this doesn't happen. It happens with other one ADA4522 (UPPER PLOT).
LTSpice simulation (attached) shows instead in lower plot LM324 (Vout1 in green) a 100Hz 5% duty-cycle square wave in sync with the mains frequency.
After snooping around this forum on similare threads I found that this circuit was built around an opamp LM324 with maybe input latched up.
Recap:
Since U1 has Vss connected to ground its output cannot swing negatively. only between 0 and +18Vcc.
OPAMP LM324:
INPUT POSITIVE WAVEFORM:
Vin+ > Vin- => Vout=Vcc.
ZERO APPROACHING PHASE:
Now Vin+ < Vin- (0V) => Vout=0.
INPUT NEGATIVE WAVEFORM:
Once Vin+ goes below -0,6V Vcm is -0,3V right? LM324 datasheet says: The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V).
What happens with more negative part of sinewave applied to the input?
Why does Vout immediately goes positive again?
And it goes, even in simulation than in real circuit. at least with the old LM324.
Does during latch up the non inverting input behaves as an inverting one making the OPAMP output going high again?
The strange was that using in lab the newer LM324 (revisionB - datasheet minimum input common mode voltage is Vss=0V) or other one (ADA4522 see simulation file) was not presenting such a behaviour.
Please help me to understand.
Thank You so much, as always
