Understanding a technique for increasing input impedance in a circuit

Discussion in 'General Electronics Chat' started by Hassan mahmoud, Jan 25, 2016.

  1. Hassan mahmoud

    Thread Starter New Member

    Jan 23, 2016
    I have struggled to understand the following paragraph in a paper:
    input biasing was accomplished with two back-to-back diodes to V bias through a 100kΩ resistor,Rb, at DC and provide a path for the amplifier’s input bias current in a similar scheme to [3], but with the addition of a second diode for protection and clamping. To mask the diode’s parasitic capacitance and conductance,Cb(2.2μF)bootstraps the input for input frequencies higher than1/2πRbCbHz, thus preserving the amplifier’s high input impedance while achieving lower noise levels than what is possible with a purely resistive bias.

    And what I understand so far is that bias circuit adds an addition, current yield to drop in the input impedance. what I cannot understand is that how this capacitance Cb will preserve amp. high input impedance? Also, which diode is referred to as a second diode? and how is it used for protection and clamping?