Greetings,
I want to design a circuit that charges battery when logic 0 is applied on the base of PNP, while on logic 1 it should disable charging the battery. Battery is to be further utilized to drive the load.
Ckt on pdf is uploaded
and
Falstad ckt design also
http://www.falstad.com/circuit/#$ 1 5.0E-6 0.23988752939670982 25 2.0 50 172 96 144 64 144 0 6 0.019000000000000003 0.1 0.0 0.0 0.5 Base Voltage w 448 144 448 96 1 w 336 160 400 160 1 t 400 160 448 160 0 -1 1.2285605556360455 -0.7714394443639545 100.0 R 448 96 448 64 0 0 40.0 14.0 0.0 0.0 0.5 g 448 240 448 272 0 v 448 240 448 176 0 0 40.0 12.0 0.0 0.0 0.5 r 336 160 256 160 0 330.0 t 464 352 512 352 0 1 -11.90146045475726 0.09853954519174227 100.0 r 432 352 400 352 0 100.0 s 400 352 400 304 0 1 false R 400 288 400 272 0 0 40.0 5.0 0.0 0.0 0.5 w 400 288 400 304 0 w 464 352 432 352 0 w 512 176 448 176 0 r 512 336 512 176 0 10.0 g 512 368 512 400 0 r 336 128 336 80 0 992000.0 R 336 80 336 48 0 0 40.0 5.0 0.0 0.0 0.5 w 224 160 256 160 0 w 224 160 192 160 0 S 144 160 96 160 0 0 false 0 w 192 160 144 160 0 R 96 176 64 176 0 0 40.0 5.0 0.0 0.0 0.5

 

What is connected to the left end of R1 (pdf)? If a 5V microcontroller, then this will not work.

 

What is connected to the left end of R1 (pdf)? If a 5V microcontroller, then this will not work.

its a microcontroller, how to solve the issue?

 

Like this ....