Transistor Inverter

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Thread Starter

Arjune

Joined Jan 6, 2018
211
My uploaded file can serve as an inverter or nor gate right? Output state switching occurs when the input to the diodes are about 1/2 the supply volts. Low is about .1 volts out. Hi out is very close to the supply volt. These voltages should be okay for CMOS logic right?
inverter.png
 

WBahn

Joined Mar 31, 2012
27,868
My uploaded file can serve as an inverter or nor gate right? Output state switching occurs when the input to the diodes are about 1/2 the supply volts. Low is about .1 volts out. Hi out is very close to the supply volt. These voltages should be okay for CMOS logic right?
View attachment 147012
Depends on your CMOS logic. If you are powering the CMOS logic with 3.3 V, then this is probably not going to work, is it?

What is it you are trying to achieve? Why not simply use a NOR gate from the same family as the CMOS logic you are trying to interface to?
 

Thread Starter

Arjune

Joined Jan 6, 2018
211
Depends on your CMOS logic. If you are powering the CMOS logic with 3.3 V, then this is probably not going to work, is it?

What is it you are trying to achieve? Why not simply use a NOR gate from the same family as the CMOS logic you are trying to interface to?
The output of the inverter would go to the input of a CMOS and gate.
 

Thread Starter

Arjune

Joined Jan 6, 2018
211
Oh, and as for your poll, the creator of what? This thread? If so, why should it matter whether or not you are female?
The Creator of existence. I rather come from a female rather from a male so it matters to me.
 

AnalogKid

Joined Aug 1, 2013
10,173
I rather come from a female rather from a male so it matters to me.
Thanks for sharing. However, your question was very poor, in that it assumes facts not in evidence.

Your circuit will work for any positive power supply voltage (Vcc) above 2 V, although if you are working down that low I suggest reducing the input resistor values. For simple inversion you do not need the diodes.

It also will work as a level translator, where the input high voltage is either more or less than Vcc. Note that Vcc must be equal to the power supply voltage for the downstream logic chips. I think this is what post #3 is referring to.

ak
 
Last edited:

atferrari

Joined Jan 6, 2004
4,672
Mixing subjects in the same "conversation" might be considered a genius' characteristics. I tend to think of it as kind of mental disorder.

And a poll?
 

MrChips

Joined Oct 2, 2009
27,679
There are single-gate chips available.

AK has some valid points that you should note which I will repeat.

What is driving your inverter?
Vcc should be the same as your CMOS gates downstream.
You don't need the diodes.
You don't need R1 if driven from a logic source.
Reduce R2 to 1k.
Increase R3 to 4k7.
What is your signal frequency?
 

AnalogKid

Joined Aug 1, 2013
10,173
Output state switching occurs when the input to the diodes are about 1/2 the supply volts.
No. The output starts to change state when the base voltage reaches about 0.45 V, and is completely saturated when the voltage hits about 0.6 V. Since there is no voltage divider on the input, the input transition level will be below 1.25 V.

All of that assumes that the output impedance of whatever is driving the circuit is significantly less than 1 K. Above 1 K, that impedance reduces the input current, which increases the input voltage necessary to begin changing state.

ak
 

Thread Starter

Arjune

Joined Jan 6, 2018
211
There are single-gate chips available.

AK has some valid points that you should note which I will repeat.

What is driving your inverter?
Vcc should be the same as your CMOS gates downstream.
You don't need the diodes.
You don't need R1 if driven from a logic source.
Reduce R2 to 1k.
Increase R3 to 4k7.
What is your signal frequency?
I can't figure out the signal frequency but I'm building a clock. I guess it would be less than one Hertz. The schematc has a two input diode or gate and I would be using a four input one.
 

Janis59

Joined Aug 21, 2017
1,523
RE:""Why not use a proper CMOS inverter gate""
Not very much. Very often there are situations when for example You need 7 invertors but there is only 6-section tablets. Then designer must decide to use a two tablets from which one has 5 sections shortened or use a one plus one bjt. At Dip its sure better, however at smd tech probably one may think twice.
Other similar situation is when somewhere must be made an output to another standard, from TTL to CMOS or to ESL, or vice versa. Third, if the output current is far too big for the normal or even rugged CMOS series. For example, 3A. Third, is the situations when it is needed to have an another signal delay, probably smaller. Applying a ultrafast bjt still is possible to get faster inverting delay than by most fastest tablets, even extreme ESL, as the 40 GHz is not the most far edge for bjt~s.
 

AnalogKid

Joined Aug 1, 2013
10,173
I can't figure out the signal frequency but I'm building a clock. I guess it would be less than one Hertz.
Wouldn't that make the clock run slow?
The schematc has ...
I Marvel at people who think they can discuss an electronic circuit while keeping the schematic a secret. The help around here is free, but it does require some respect.

ak
 
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