synchronous circuit

Thread Starter

lidor250

Joined Oct 2, 2021
10
Hi!
I'm trying to design a synchronous circuit which its functionality is- when the input (one bit each clock cycle) is 1 - the output is 1 for N clock cycles.
during those N clock cycles it doesn't matter what the input is.
what is the simplest way to do it?
I tried to do it by a counter which counts to N and then resets and stops itself, but it didn't work entirely.
thanks everybody :)
 

Ian0

Joined Aug 7, 2020
9,668
This is homework help, so I'm offering hints, not the complete answer.
Assuming that N is small, then how about an N-stage shift register, and a JK flipflop (if it didn't have to be synchronous, then set-reset would have done)
First output of the shift register to J, Nth output to K. Nth output also clears the shift register.
 

Thread Starter

lidor250

Joined Oct 2, 2021
10
This is homework help, so I'm offering hints, not the complete answer.
Assuming that N is small, then how about an N-stage shift register, and a JK flipflop (if it didn't have to be synchronous, then set-reset would have done)
First output of the shift register to J, Nth output to K. Nth output also clears the shift register.
Thank you for your help.
Thought about N shift register, but I can't assume N is small, so that kind of solution would be inefficient.
 

dcbingaman

Joined Jun 30, 2021
1,065
Hi!
I'm trying to design a synchronous circuit which its functionality is- when the input (one bit each clock cycle) is 1 - the output is 1 for N clock cycles.
during those N clock cycles it doesn't matter what the input is.
what is the simplest way to do it?
I tried to do it by a counter which counts to N and then resets and stops itself, but it didn't work entirely.
thanks everybody :)
It sounds like input is not synchronized to the clock? Be sure to send the input to a register first to synchronize the input to the clock. Otherwise you risk metastability.
 
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