I would hazard a guess thats supposed to be the boosted output ?There's no power shown to Q2's drain.
You don't say what the simulation error is nor what simulator you are using.....would help ?I am trying to create a synchronous boost dc-dc converter. I have attached the circuit diagram but I am getting stuck with simulation as a simulation error occurs. The signal generator has a square wave of 5V. Any help would be greatly appreciated.View attachment 126641
It's drawn a little funny, but it works in LtSpice.I am trying to create a synchronous boost dc-dc converter. I have attached the circuit diagram but I am getting stuck with simulation as a simulation error occurs. The signal generator has a square wave of 5V. Any help would be greatly appreciated.View attachment 126641
Because you have not built in any specific voltage limiting or regulation beyond that accidentally provided by the load and input power limiting. Should the power consumed by the output decrease the output voltage will rise, should the output load become open circuit something will give! Some mosfets are designed to absorb some reverse breakdown avalanche power but it's not something I would wish to rely upon. If the circuit is quite low power (as it looks) then a TVS device across the output would be a simple solution.@fourtytwo, why is that? I have built it and that is not happening
Of course. I didn't look carefully at the schematic and missed V1.I would hazard a guess thats supposed to be the boosted output ?
by Jake Hertz
by Jake Hertz
by Duane Benson