Startup Circuit Configuration

Thread Starter

Mustafa Uzuner

Joined Dec 17, 2016
10
Hi,
I am trying to build a bandgap reference circuit for my project. To do this, I have developed a startup circuit. I use a basic structure of startup circuit which can be seen below. The MSU2 represents resistor(diode connected load), MSU3 controls the rest of the circuit and MSU1 controls the gate of MSU2. I have understood the working principles of the circuits and arranged the W/L ratios as in the Figure. This circuit works when I set VDD to 3.3V. Drain of the MSU3 increases and gate of the MSU1 decreases.
The problem is my professor asks for two requirements. First one is that VDD must be around 1.2V. So, I assume I need to update W/L values based on this (probably increase the ratio of MSU2 to have a lower resistance). The other requirement is the circuit must settle after 3 us. If the only requirement would be voltage, then I could arrange that by changing ratios. However, I don't know how to make an arrangement for timing and satisfy both requirements. (I am neglecting the temperature for now). Any advice or source to read is going to help me a lot. Thanks for your help.
1589849461386.png
 

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Thread Starter

Mustafa Uzuner

Joined Dec 17, 2016
10
Hi,

I need a PTAT - CTAT circuit for controlling the temperature for my bandgap reference circuit. I have some schematics and basic understanding for a BJT based design, but I don't know how to transfrom this design to a MOSFET based design ( I need to use MOSETs).

I don't know how to connect terminals properly and I don't know how to express [VT * In(n] (ID/IS for BJT) in the case of a MOSFET. There are some papers online but they are quite complicated for me. Do you have easier documents or tips? Thanks for your help.
 

Papabravo

Joined Feb 24, 2006
13,724
AFAIK the processes for fabricating BJT and MOS transistors are not compatible.

Ahh..never mind. It says in my notes that all it takes is an extra diffusion layer.
 

Bordodynov

Joined May 20, 2015
2,603
I'm a former chip developer. One of the chips I developed had a 3V thermostabilized voltage stabilizer. The chip was made using CMOS technology. I used two parasitic NPN transistors. The rest of the stabilizer circuit was on field transistors. There are always parasitic bipolar transistors in CMOS technology. It's not a standard approach, though.
 

Tako

Joined Oct 21, 2014
65
You should rather be able to satisfy your professor's requirements. Run your simulation and measure current settling time. What it is?

You will be able to connect MSU2 gate to ground to have MSU2 in linear region if that helps, but we will see after your simulations. Generally, I see many ways to modify if that would be a necessity.

For resources: Baker and Razavi - if I remember correctly, you should be able to find good information there.
 

Tako

Joined Oct 21, 2014
65
Hi,

I need a PTAT - CTAT circuit for controlling the temperature for my bandgap reference circuit. I have some schematics and basic understanding for a BJT based design, but I don't know how to transfrom this design to a MOSFET based design ( I need to use MOSETs).

I don't know how to connect terminals properly and I don't know how to express [VT * In(n] (ID/IS for BJT) in the case of a MOSFET. There are some papers online but they are quite complicated for me. Do you have easier documents or tips? Thanks for your help.
To understand you: for bandgap architecture, e.g.:



Source: https://www.researchgate.net/publication/26571579/figure/fig1/AS:319964444676108@1453296876601/Low-voltage-bandgap-reference-circuit.png

you cannot use Q1 and Q2 as BJT transistors, but you must use MOS transistors instead?
 

Thread Starter

Mustafa Uzuner

Joined Dec 17, 2016
10
Last edited:

Tako

Joined Oct 21, 2014
65
Ok, so what are your problems?

I designed many analog CMOS IC bandgaps so I understand them and I can help you, but I need your problems/questions.

If you are doing a bandgap without opamp so you are doing a variation of this architecture:
 
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