Hi ,
I am simulating the read and write operations of a 6T SRAM cell using LTSpice. But, i am not getting a proper output. The simulation results shows that the output (stored bits) changes with bitline even if the word line is low. Why it is so?
The transistor (nmos ) output depends on the gate voltage right? Then why it changes with bitline?
these are the results i got...
Please help me.
Thank you
I am simulating the read and write operations of a 6T SRAM cell using LTSpice. But, i am not getting a proper output. The simulation results shows that the output (stored bits) changes with bitline even if the word line is low. Why it is so?
The transistor (nmos ) output depends on the gate voltage right? Then why it changes with bitline?
these are the results i got...




Please help me.
Thank you