I saw a video in which he said that there are two types of latches nand latch and nor latch! In nand latch Q is infront of S while in not R is infront of Q. both the tables give different outputs.I have uploaded the screenshot!
Hello,
The difference is whether you are using positive logic or negative logic and if you do not recognize that fact it makes things seem very strange and unusual.
Consider your NOR version, in that version the 1's make all the difference so that the output states are dependent on that. This is positive logic because the outputs follow the inputs in the usual way.
Then consider the NAND version, in that version the 0's make all the difference (not the 1's as it may look like at first) and if you recognize that fact it makes much more sense. So in other words, your S and R should be labeled S' and R' and possibly swapped. Try that and see how nice it works out. S' means NOT(S). Now when you apply a single zero 0 to S it is interpreted as not S and so the output changes accordingly so the Q goes to a 1 with S set to zero not 1. Thus the input is viewed as negative logic and the output positive logic.
So in comparison, the NOR takes a 1 on the S to set the Q, and with the NAND version the S takes a 0 to set the Q because the S is really S'.
Relable S to S' and R to R' and see the difference.
In your previous drawings the clock input is not connected and with an SR latch that means it is just an SR latch with no clock. We dont normally leave it floating however.
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