SN7490 Counter problem - won't respond to clock signal

Thread Starter

beginnersluke

Joined Aug 26, 2015
35
Hello all,

I've built a simple circuit with a SN7490 counter and a SM7447 BCD to 7-segment decoder, as well as the 7 segment display itself.

I've included a sketch of how it is all hooked up.

I've read through the data sheets, and thought I understood everything (I'm just learning all this stuff), but it doesn't work.

The BCD to seven-segment bit works great. (When I connect the ABCD input to high/low signals, the seven-segment displays just what I expect.)

When I connected the 7490 though -- it doesn't actually count.

All of the reset inputs are connected low.

Clk B is connected to QA (I would like it to count to 10, and this is what I understood from the data sheet should be done).

Clk A, I connected to ground with a 4.7k resistor, then would connect it to high/+ with hookup wire.

I expected that each time I connected the CLK A pin to +, the count would go up by one.

No such luck.

I played around a bit. If I put the resistor to pull-up, then connect CLK A to ground/low with my wire, it counts -- sort of -- it bounces around a lot. (I think it's bouncing because a couple of times, I got the count to go up by one, each time.

I thought this was strange.

Stranger still (I thought) even if I kept the resistor as a pull-down resistor, I could still get a count too (though, again, with a lot of bouncing).

Nothing I did would get it to count when I connected to high.

This should count up on a high signal correct? (It would seem so from the way CLK B should count when QA is high.)

I also tried a different battery (so I don't think that's the issue), and a different 7490 IC (though from the same batch, seemingly).

I'd really appreciate some help in figuring out what's going on here.

Thanks!
 

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Papabravo

Joined Feb 24, 2006
14,420
Bouncing is what happens with a mechanical switch. Nothing you do is going to change that. Also -- TTL devices do not like pull down resistors. The inputs source current into the resistors which causes the voltage to rise to the vicinity of the threshold voltage which makes them noise sensitive. You need to construct a circuit that gives a reliable and clean clock signal.
 

Thread Starter

beginnersluke

Joined Aug 26, 2015
35
Okay, so I put together an astable 555 circuit, and...

It counts beautifully.

I do notice that it advances the count when the 555 goes from 1 to 0. (To me this seems like it's counting the ZEROs not the ONEs, but maybe that's not the right way to think of it.) It would be correct to say it advances on the falling edge, correct?

So let me ask some questions:

1. So with TTL, I should not use pull-down resistors. Also no pull-up resistors?
2. Should this counter/circuit be advancing on the falling edge?
3. If I want to count the number of times I flip a switch, I would connect my switch between Ground and CLK A (with no pull-up resistor)? (But I should expect bounce.)
4. What are some ways to make the switch reliable (not bouncy)? (I'll google of course, but if someone knows a good write-up, that would be nice.)

Thanks a lot for the help. Learning is fun!

Luke
 

dl324

Joined Mar 30, 2015
11,543
I do notice that it advances the count when the 555 goes from 1 to 0. (To me this seems like it's counting the ZEROs not the ONEs, but maybe that's not the right way to think of it.) It would be correct to say it advances on the falling edge, correct?
You should think of it as being clocked by the falling edge of the clock.
1. So with TTL, I should not use pull-down resistors. Also no pull-up resistors?
Pull-up resistors are commonly used.
2. Should this counter/circuit be advancing on the falling edge?
Yes. This information should be given in the datasheet, though it wasn't in the first one I checked. The Motorola datasheet gave that information and the symbol they used showed a bubble on the clock inputs which makes clock polarity easy to discern.
3. If I want to count the number of times I flip a switch, I would connect my switch between Ground and CLK A (with no pull-up resistor)? (But I should expect bounce.)
You can't have floating inputs.
4. What are some ways to make the switch reliable (not bouncy)? (I'll google of course, but if someone knows a good write-up, that would be nice.)
There are a number of ways to debounce switches. The simplest is with a capacitor, but it's simplicity is not without faults. You can use flip flops (e.g. RS). There are IC's that debounce switches.

Since you're just getting started, I'd recommend you learn how to draw more readable schematics, and use the dot connection method so you don't need to use humps to show wire crossings that don't connect.

I'll attach an example when I get a chance.
 

Thread Starter

beginnersluke

Joined Aug 26, 2015
35
Yes. This information should be given in the datasheet, though it wasn't in the first one I checked.
Yeah, I may have missed it, but I couldn't find it in the data-sheet I had. I don't know why I expected it to count on the leading edge, but I think that expectation was one of my bigger problems on this.

You can't have floating inputs.
So connect the switch between CLK A and GND/-, but with a pull-up resistor, yes?

Since you're just getting started, I'd recommend you learn how to draw more readable schematics, and use the dot connection method so you don't need to use humps to show wire crossings that don't connect.
That I can do! :)

Thanks
 

ebp

Joined Feb 8, 2018
2,332
You can use a pull-down resistor with TTL, but the value must be quite low.

A standard TTL input sources nominally 1.6 mA - that is, when it is at a valid logic LOW level, 1.6 mA will flow out of the input to ground. This is using "conventional current" which is considered to flow from positive to negative. When you look at the datasheet, there is a minus sign in front of the current specification - this means that the pin is current sourcing for the specific conditions of that specification.

The maximum voltage that TTL is guaranteed to interpret as a valid logic 0 is 0.8 V. It is best to make the input lower than that, so there is some "noise margin."

So, 1.6 mA at 0.8 V requires 0.8 / 0.0016 = 500 ohms. Better to use something lower, like 330 ohms, which would bring the input's voltage down to 0.53 volts.

If you use a sufficiently high value of pull-down resistor, the current will be less than 1.6 mA, so it is harder to predict what the voltage would be. This can be reasonably approximated by looking at the internal structure of a TTL input. For standard TTL there is a resistor of about 4k ohms in series with essentially a diode (actually base-emitter junction of a transistor) of about 0.7 V forward voltage between the +5 V supply and the input. When you do the arithmetic, it works out to about 2.3 volts if you try to use 4.7k ohms as a pull-down. That is a valid logic HIGH for TTL.

When you do these sorts of calculations, there often is not close agreement between what is specified and what you calculate based on internal structure. A big part of this is that the specifications are "it will always work if you do ...", whereas the internal resistors are broad tolerance and typical values are shown. Always use specified values to be sure the circuit will work properly.
 
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dl324

Joined Mar 30, 2015
11,543
I may have missed it, but I couldn't find it in the data-sheet I had. I don't know why I expected it to count on the leading edge
As I mentioned, the first datasheet I read (TI), didn't mention in the description which edge clock triggered on. But looking at the logic diagram, you can see the bubbles on the clock inputs to the flip flops which indicates they are low active (falling edge):
upload_2018-6-16_18-35-30.png
This is the description from a Motorola datasheet:
upload_2018-6-16_18-36-39.png

The first page also has a pin name table which specifies clock polarity:
upload_2018-6-16_18-37-30.png

The logic symbol on the first page also gives clock polarity:
upload_2018-6-16_18-38-19.png

Your schematic is missing the required current limiting resistors:
upload_2018-6-16_18-38-57.png

Your schematic would be more useful if you included pin numbers and all connections (you had to tie BI/RBO, RBI, and LT HIGH, left floating, they're not guaranteed to be one state or the other).

This is my redraw using more conventional flow (mainly left-to-right and top-to-bottom):
upload_2018-6-16_18-33-13.png
We try to draw schematics so they convey circuit functionality. I don't like the pin order on the display component I used. I would have put all of the inputs on the left side (which the counter and decoder symbols did). The power connections are implied, but it's useful to include them if they don't follow the usual convention.

I also would have liked bubbles on the counter clock inputs and bubbles on the decoder outputs. But I'm not in the mood to edit the symbols for the counter and the decoder was actually 74LS48 (which has HIGH active outputs, so the symbol is correct) because my editor didn't have 74LS47.
 

MrChips

Joined Oct 2, 2009
21,877
Here is another example of circuit schematic, using 74160 counter instead.
Notice that we avoid crossing lines. All pins are numbered.




If you have a SPDT switch, use this to debounce the switch:

 

RichardO

Joined May 4, 2013
2,271
If you have a SPDT switch, use this to debounce the switch:

Here is a variation on the NAND gate debounce circuit.
Note that the circuit depends on the internal current limiting of the inverters. The outputs are only shorted a few nanoseconds while the flip-flop changes state.

upload_2018-6-17_11-28-14.jpeg


p.s. I think I first saw this circuit in a development system for the IMP16 microprocessor. Boy, that sure dates things...
 

AnalogKid

Joined Aug 1, 2013
8,596
The schematic in post #1 shows a 4.7K pull down resistor. This is a problem.

Unlike any CMOS variety, true, old TTL, like your 7490, has specific pull-down resistor limitations that are different from the pull-up limitations. For pull down, the resistor must be less than 500 ohms. Greater than that, the the chip might not see a valid logic 0 voltage on the input when the switch is open. Reducing the resistor to 220 or 330 ohms should solve the problem. Note that the input still will bounce unless there is a capacitor across either the switch or the resistor, and the low resistor value means you need a larger capacitor.

The reason for the low resistor value is that a TTL input is actually an output. When you pull the input low, current runs out of the input pin, through whatever is driving it low, to GND. For your part that current is approx. 1.6 mA, not the nanoamperes of CMOS parts. Pulling 1.6 mA down below 0.8 V (the TTL input threshold level) requires 500 ohms or less.

ak
 

MrChips

Joined Oct 2, 2009
21,877
The reason for the low resistor value is that a TTL input is actually an output. When you pull the input low, current runs out of the input pin, through whatever is driving it low, to GND. For your part that current is approx. 1.6 mA, not the nanoamperes of CMOS parts. Pulling 1.6 mA down below 0.8 V (the TTL input threshold level) requires 500 ohms or less.
aargh! Don't say that. You will confuse the hell out of newbies.

The datasheet is the place to go and get the required information. It will say for 7400 series gates Low-level input current IIL is -1.6mA.
The negative sign means that the current direction is out of the input pin.

Low-level input voltage VIL is 0.8V.
Hence to be on the safe side, you want the input voltage to be lower than 0.4V.
Rpulldown = 0.4V / 1.6mA = 250Ω
 
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