I just wanted to confirm that my oscillator will drive my circuit correctly. I am focused on rise time vs slew rate in this calculation.

The receiver which runs off 1.8V has a slew rate of 1V/ns which is measured from .35(1.8V) to .65(1.8V).

The clock driver has a rise and fall time spec of 1.1ns from 10% of 1.8V (.18V) to 90% of 1.8V (1.62V)

So if I just do: 1V/ns = (1.62-.18)/x, I get a time of 1.44ns which will meet my 1.1ns rise time of the oscillator? Is this correct?

 

In order to give you a qualified answer more information is needed.

What is the oscillator?
What is the oscillator driving?
What is the frequency of oscillation?

A circuit schematic would be most helpful.

 

Pg.5 and on (a side note : the slew rate of the op amp is likely a bit differently defined as the one for the digital gate !)

 

Added load (sysclk) and oscillator that is driving the circuit. Sorry rise time is actually 3ns not 1.1ns

 

? about #2
https://www.analog.com/en/analog-di...eed-converter-clock-distribution-devices.html
. . .