SIMULATION OK, BUT SHOWING WIERD RESULT IN FPGA

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Payel Banerjee

Joined May 12, 2017
1
sir , after doing many attempts , i am writing you . i am sending you a part of a code sample ... its showing perfect result in simulation but not in hardware i.e fpga . in fpga its showing wierd results . rather the results are uncertain . sir , i just want to know is the way i have written the state machine is correct or not .?
 

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