So really, all he needs to do is delay the transmittal of the inputs. Hold them low for one (assumed) second.

You can also delay the output of the gate, which is what my circuit in post #10 does.

 

@crutschow - True. Somehow I was getting trapped on the idea that he wants to POWER the 4070 after a delay period. That approach may be problematic, but it's a realm of theory I'm not well practiced in. I say 'Let the system power up before it starts taking inputs.' That will probably be easier on the chip. It's like not letting you drink another cup of coffee, versus tying your - um - in a knot.

 

I thought that the delay to vcc is because there will be only one circuit as I mentioned in my first post.
but delay to inputs or outputs of the ic require four circuits for that i have no place on the board.
I am thinking to delay the power to the relay instead of IC.

 

What is the active level at the outputs of the 4070? Do the outputs clock something or are they just combinatorial signals?

If they are active LOW, the sensible thing to do is probably to replace the 4070 with a 4093 and use them properly as NAND gates with the second input of each gate to a common delay circuit requiring nothing more than one capacitor and one resistor (and a diode if rapid reset is required). If they are active HIGH then a NOR gate (negative input AND) is required with a delay circuit configured slightly differently. I know of no Schmitt trigger NOR, but that may not be of any real consequence unless they clock sequential circuitry.

[EDIT]: The 74HC7002 from TI is a Schmitt NOR, but not pin compatible.

 

I thought that the delay to vcc is because there will be only one circuit as I mentioned in my first post.
but delay to inputs or outputs of the ic require four circuits for that i have no place on the board.
I am thinking to delay the power to the relay instead of IC.View attachment 161025

If you want to delay power to the relay board, I think my circuit from post #12 would probably work for that.

On the other hand, I like the sound of @ebp's suggestion too (and he's got way more experience than me, so I generally defer to his opinion when in doubt.)

If they are active LOW, the sensible thing to do is probably to replace the 4070 with a 4093 and use them properly as NAND gates with the second input of each gate to a common delay circuit requiring nothing more than one capacitor and one resistor (and a diode if rapid reset is required). If they are active HIGH then a NOR gate (negative input AND) is required with a delay circuit configured slightly differently.