I think you have other problems to fix. As I read your schematic you have N-channel MOSFETs with their sources connected to ground. Good. However, you have the drains connected to something labeled "Negative -." ***IF*** the drains are indeed able to be negative relative to the sources, you have a problem. Also, what is the purpose of the diodes from gate to ground? U13 cannot swing negative, so the diodes will never conduct. Also, you have no DC path from the output of U13 to its inverting input; U13 will always be in either negative or positive saturation.Sorry about the silly question if it seems, would it be correct to have the GND from the capacitor (circled) to be connected to the common GND or to the drain of the MOSFET ?
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Thank you for noticing.I think you have other problems to fix. As I read your schematic you have N-channel MOSFETs with their sources connected to ground. Good. However, you have the drains connected to something labeled "Negative -." ***IF*** the drains are indeed able to be negative relative to the sources, you have a problem. Also, what is the purpose of the diodes from gate to ground? U13 cannot swing negative, so the diodes will never conduct. Also, you have no DC path from the output of U13 to its inverting input; U13 will always be in either negative or positive saturation.
No, U13 is not drawn as a unity gain buffer (i.e. voltage follower). In your first post you asked whether the circled ground should be connected to the MOSFET drains. Does that make sense? As I and Mr Chips interpreted your question, that would connect the drains to ground. I now suspect, knowing more of what you are doing, that you meant to disconnect the caps from the ground as shown and reconnect them to the drains. That might make sense, but I don't know enough about welders to say yea or nay. I also do not know where SCAP_2 and SCAP_3 connect. The diodes remain ineffective.Thank you for noticing.
The positive and negative are for electrodes. This is for a spot welder using maxwell BCAP0310 ultracaps.
U13 is a voltage buffer, isn’t it how it is drawn ?
I think they are zener diodes for protecting Gate.I think you have other problems to fix. As I read your schematic you have N-channel MOSFETs with their sources connected to ground. Good. However, you have the drains connected to something labeled "Negative -." ***IF*** the drains are indeed able to be negative relative to the sources, you have a problem. Also, what is the purpose of the diodes from gate to ground? U13 cannot swing negative, so the diodes will never conduct. Also, you have no DC path from the output of U13 to its inverting input; U13 will always be in either negative or positive saturation.
That is correct those are meant to protect the gates as an added safety feature just in case the voltage spikes for some unknown reason.I think they are zener diodes for protecting Gate.
Thank you for posting the schematic and operational description so that readers can understand more clearly what you are trying to do. Professionals are no better mind readers than non-professionals. At this time I stand by all my earlier comments and add that the ground point you circled should remain connected to ground; physically C10 & C11 should be grounded near the MOSFET sources (not drains). Physically, the path from H4/Positive+ through the supercaps and thence through the MOSFETs to H10/Negative- should be as short as possible with very heavy conductors to minimize both resistance and inductance of that path. I understand that the schematic you posted is not your final design and you may already have ideas to correct some deficiencies. Additional errors that I have seen in the schematic are: (1) All opamps and comparators must have a path for the DC input bias current to flow; you have not provided such a path for the U1B, U1D, U11B devices, nor for the TLV2371; without that path the outputs of the devices is indeterminate. (2) The LM339 comparator has open-collector outputs; that is, the outputs can only pull down to the negative supply (in this case that is ground, 0V). You have not provided pull-up capability for any LM339 section. (3) I assume that D13, D16, D28 are intended to provide protection in the event that primary power is inverted (H11 made negative relative to H1). I suggest that better protection would be offered by connecting these rectifiers between ground and H11, rather than between ground and Vcc, so that F1 can limit current through the rectifiers. (4) As currently shown, I see no purpose for D15, D17, D29 and thus also for R7, R29, R52. There may be other errors that my first scan did not uncover. I strongly encourage you to use a simulator (e.g. LTspice or similar) to analyze individual blocks of your circuit to verify they will operate as you expect. It will not be feasible to simulate the entire circuit at one time. Good luck with your project.The circuit is just part of the whole project. i was yet to finish the wiring on the schematic and half way through i got confused with the capacitor GND. Me being a novice electronics hobbyist i thought for others, more professional people would it find it easier to grasp the idea.
The idea here is that the capacitors are in a 3s3p configuration making a total voltage of 8.1v, each parallel caps are charged via comparators U1A and U11A to 2.7v. The reference voltage 2v (it would 2*3 = 6v being the total voltage) is set by the zener. Lower than 6.4 charges the caps and at 8.1v stops charging, which is yet to be done. When J1 (pedal) is closed the microcontroller sends a pulse to the MOSFET driver which triggers the MOSFETs and completes the circuit for the caps to discharge. The Negative and Positive terminals are connected to two copper pins which act as electrodes to spot weld nickel strips to 18650 cells. A rough schematic attached.
After some reading i figured that bias current is something to keep the opamp ready for action. Somewhat like keeping a car engine running when waiting at a traffic light.(1) All opamps and comparators must have a path for the DC input bias current to flow; you have not provided such a path for any of the LM339 devices, nor for the TLV2371; without that path the outputs of the devices is indeterminate. (2) The LM339 comparator has open-collector outputs; that is, the outputs can only pull down to the negative supply (in this case that is ground, 0V). You have not provided pull-up capability for any LM339 section. (3)
First, the input bias current of an opamp or comparator has nothing to do with being "ready for action". View the "functional schematic" below (extracted from T.I. datasheet for LM339). Note that IN+ and IN- both go directly to the base of a transistor. Being bipolar junction transistors (BJT's), in this case PNP, "transistor action" requires that some current flow out of these bases; if there is no base current the transistor is simply cut off and does nothing. When those base currents flow through the inputs of an opamp or comparator (in this case the transistors are part of a differential amplifier stage) the currents are called "input bias currents." Thus, to use the differential amplifier within the opamp or comparator, the external circuitry must provide a path for the flow of the input bias currents. Also, note that while opamps and comparators have many similarities, they are different kinds of devices and are used in a different manner. Op-amps are not comparators; comparators are not opamps.Thank you Teekay6. Most of it was new to me and i've implemented them in the design, but i have never grasped the fact about
After some reading i figured that bias current is something to keep the opamp ready for action. Somewhat like keeping a car engine running when waiting at a traffic light.
If its not too much, could you please roughly mention how its done on the attached LT spice. It is basically a comparator to monitor the voltage of each series cap to see to if they drop below 1.4v then the output of the first opamp goes low which connected to the inverting pin of the next opamp which switches on a MOSFET to charge the CAP.
So this is only specific to comparators that have an open collector, correct ? Not sure if i need a rail to rail here. but mostly use rail to rail as it would not hurt anything with what i design.If you want the external circuitry to be driven toward the positive power supply, you must provide some path between the power supply and the transistor collector through which current can flow.
Saturation meaning beyond the voltage/current what the data sheet has mentioned. What if the recommended voltage 5 at the base is 5 and it is run 5, does that mean saturation ? i think not. but 6 would be, rite ?if the current is not too large, the transistor will be "in saturation"
I meant can you show how it would like in a schematic about the bias current. Never mindI understand it now.Second, I do not understand what it is that you want me to do via the "Maxwell Dual LVC" schematic you attached. You say "...mention how it's done..." How what is done?
"So this is only specific to comparators that have an open collector, correct ?" Yes.So this is only specific to comparators that have an open collector, correct ? Not sure if i need a rail to rail here. but mostly use rail to rail as it would not hurt anything with what i design.
When working with transistors i use them as a switch, so from the YouTube videos (some ppl break things down to simple english) i learned that the emitter collector can be closed by applying voltage to the base. So here its at the collector ? does it the current flow to the base from here ? and maybe switch on that transistor or something ?
Saturation meaning beyond the voltage/current what the data sheet has mentioned. What if the recommended voltage 5 at the base is 5 and it is run 5, does that mean saturation ? i think not. but 6 would be, rite ?
I meant can you show how it would like in a schematic about the bias current. Never mindI understand it now.
So if am using a Rail-to-Rail comparator would there be a need for a pullup resistors ? or it would be based on the datasheet. Is it only for comparators with open collectors that this needs to be followed. In the attached simplified schematic of LT1716 the out pin has collectors, a pullup resistor would be required or since they are rail-to-rail it would not be needed ?
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Be patient. Response coming.Thanks i will look into those. What would be couple of pointers to lookout for when selecting a comparator ? Mostly i simulate with LTspice but during assembly i order form other bands as LT is a bit too expensive.
I am trying to add some degree of hysteresis. Can you help me calculate it please. Just looking for a 500mV. Lower threshold of 1.5v and a High of 2v. I can't seem to get it. Are there any considerations to be taken into account when driving a load. i just look at the max current the comparator can drive and keep something below it.
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In general, yes. You must consider the effect of other circuit elements on the reference, whether shared or not. For example, include effects of bias currents of the comparators/opamps, loading that alters the reference value, whether sharing will unduly complicate the PCB layout (e.g. long traces subject to leakage and noise pickup, and difficulty in maintaining an appropriate ground over a greater separation).Is it ok to have a common a reference for 3 comparators or should its individual reference ?
That was obvious. What I question is whether such protection is warranted, and that is certainly based on your perception of risk. These (Q2-Q6) MOSFETs have high capacitance gates, low driving impedances (220Ω), and direct connection to ground. Other MOSFETs (Q7-Q9) may be equally subject to damage but have no gate protection. It is not reasonable to provide protection for every component because "something unknown" (a meteorite, a particle of conductive dirt, a solder bridge during assembly?) might damage them. I am not "directing" you to use or omit such circuit elements; I am simply highlighting that the case for using them is not clear cut. Every component added complicates PCB layout, adds cost, adds area..I think they are zener diodes for protecting Gate.
I've added individual reference for each opamps, don't want any space for error after all are assembled. After all goes well i will see if one would be ok and maybe cutdown on the on the diodes used.In general, yes. You must consider the effect of other circuit elements on the reference, whether shared or not........
Yes i understand there is cost, space and risk during design. From couple of posts that i read, most of them say it would be unnecessary but having it in a design would save a 3$ MOSFET. The BOM would be reduced once i have the PCB assembled and then spend some time with the scope to decide.That was obvious. What I question is whether such protection is warranted, and that is certainly based on your perception of risk. These (Q2-Q6) MOSFETs have high capacitance gates, low driving impedances (220Ω), and direct connection to ground. Other MOSFETs (Q7-Q9) .........