I'm setting up hardware SPI as master on PIC MCU please refer to datasheet link at the bottom
Page 359 says we can configure SPI1CON1 register bits SSPM<3:0> for some choices, where I choose value 0010 that is for SPI acting as Master with clock Fosc/64, I'm using MCU internal OSC at 4Mhz that means 4,000,000/64 = 62,500 should I expect 62,500 cycles/sec (SPI clock signals) at SCK pin?
My 2nd question is what max voltage I can expect on SCK while I'm running MCU at 3.3v, I was not able to find any reference to this on datasheet.
Datasheet 16LF18324
Page 359 says we can configure SPI1CON1 register bits SSPM<3:0> for some choices, where I choose value 0010 that is for SPI acting as Master with clock Fosc/64, I'm using MCU internal OSC at 4Mhz that means 4,000,000/64 = 62,500 should I expect 62,500 cycles/sec (SPI clock signals) at SCK pin?
My 2nd question is what max voltage I can expect on SCK while I'm running MCU at 3.3v, I was not able to find any reference to this on datasheet.
Datasheet 16LF18324
