Setting up SPI in master mode on 16LF18324 calculating clock time and high signal

Thread Starter

sairfan1

Joined May 24, 2012
103
I'm setting up hardware SPI as master on PIC MCU please refer to datasheet link at the bottom

Page 359 says we can configure SPI1CON1 register bits SSPM<3:0> for some choices, where I choose value 0010 that is for SPI acting as Master with clock Fosc/64, I'm using MCU internal OSC at 4Mhz that means 4,000,000/64 = 62,500 should I expect 62,500 cycles/sec (SPI clock signals) at SCK pin?

My 2nd question is what max voltage I can expect on SCK while I'm running MCU at 3.3v, I was not able to find any reference to this on datasheet.

Datasheet 16LF18324
 

Irving

Joined Jan 30, 2016
3,895
I'm setting up hardware SPI as master on PIC MCU please refer to datasheet link at the bottom

Page 359 says we can configure SPI1CON1 register bits SSPM<3:0> for some choices, where I choose value 0010 that is for SPI acting as Master with clock Fosc/64, I'm using MCU internal OSC at 4Mhz that means 4,000,000/64 = 62,500 should I expect 62,500 cycles/sec (SPI clock signals) at SCK pin?
That appears to be correct.

My 2nd question is what max voltage I can expect on SCK while I'm running MCU at 3.3v, I was not able to find any reference to this on datasheet.

Datasheet 16LF18324
If not otherwise spec'd, assume normal i/o pin spec. ie minimum of VDD-0.7v @ 6mA
 

Thread Starter

sairfan1

Joined May 24, 2012
103
I'm looking to learn one more think based on above question, as we calculated speed 62,500/sec. is it possible that we can estimate clock (signal) time high, and clock time low from the SPI speed?
 

Irving

Joined Jan 30, 2016
3,895
I'm looking to learn one more think based on above question, as we calculated speed 62,500/sec. is it possible that we can estimate clock (signal) time high, and clock time low from the SPI speed?
I don't think so. I suspect its a square wave.
 
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