I am currently having issues with a security system that we are supposed to design for class. What it needs to do is take a 4 bit code, and check it to see if it correct. If it doesn't, it will give you one more chance, using an alternative code, to unlock the door. My circuit currently allows the door to unlock after it is clocked 4 times with S2, however, if you put the wrong code in, it requires a fifth clock for it to turn on the ARMED switch as well as the "Call the Cops" switch. Any help would be greatly appreciated.

 

You might state with a state diagram for your system, including a description of what it is supposed to do along the way.

You talk about it requiring a fifth clock to do some things as though this is a problem, but you don't tell us what it is supposed to require, so how can we even know whether it is wrong, let along why it is wrong?

 

Based on the current circuit, in order to enable Armed or Alarm, it requires you clock five times. It should be four. The circuit currently enables Open Lock on the fourth clock. This is what it should be doing for the other two(Armed and Alarm). I'm not sure if that helps you understand what it should be doing more.

 

What are the specifications for the problem? What is the difference between Armed and Alarm? You say that is supposed to enable Armed and Alarm and Open Lock all on the fourth clock? So where does this second chance come in? The starting point for solving any problem like this is clear and precise specifications detailing what the problem is and what constitutes an acceptable solution.

 

For the problem we need to design a home security system that takes a 4 bit input from S1, which is clocked by S2, and see if it matches our code to unlock the door. So if you have a 1 on S1 and then you put a 1 on S2, that is put into the shift register as a 1. If you have a 0 on S1 and then you put a 1 on S2, that is put into the shift register as a 0. My current code for testing is just going to be 1111. I test this by sending each Q value from the shift register into a 16-1 Mux. The mux is enabled by the mod 5 counter at the bottom of the diagram. Currently, it works correctly in that it checks the valididity of the code on the 4th time that you put a 1 on S2.

Here is the problem: The system is not working properly when a wrong 4 digit code is entered. A 1010 code makes it so that I need to hit S2 one more time for it to go to the Armed LED. This is supposed to signal the user that they have one more try using an alternative code(currently set at 1110 in my mux. I need to make it that the code will get checked on the 4th hit of S2 no matter if the code is valid or not. And if it is not valid, it needs to light the Armed LED, while giving the user one more try with the alternative code. If that code does not work either, the alarm goes off and the police are called.

 

That helps quite a bit. I'm still having to guess a bit at some of the details. That you say that you are using a mod-5 counter and that things are requiring a fifth clock pulse when they should only require four is immediately suspicious.

It would be very helpful (to you, too, I imagine) if you were to draw a timing diagram of what should happen step by step for each of the major scenarios such as a correct code on the first attempt, a correct code on the second attempt, no correct code.