hi everyone ,, i hope u fine !!! , actually i was asked to design an Resistor Transistor Logic Family - an OR GATE . i know how does it look like (shown in Fig."ATTACHED") but the problem is in filling the resistors values ..
i was asked also to Simulate the ckt using PSpice !!!





Any written Comment will help me !!! plz write anything !!

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mario ...

 

That can't give an OR function. A HIGH in gives a LOW out, making it a NOR.

 

Unless R1 is very large that transistor will always be on won't it?
If so then why is R1 there at all...

Looking at the Wiki discussion page (it's from Wiki) they're all arguing about it and R1 should be connected to a negative supply.
http://en.wikipedia.org/wiki/Talk:Resistor–transistor_logic