Hello, I'm trying to design a circuit using the SN74AHCT1G08 AND gate. DigiKey lists the high-level input voltage as 2V, but in my simulation, the gate output voltage remains at the “low” level even at 2V. Why is this happening?

 

the gate output voltage remains at the “low” level even at 2V. Why is this happening?

2V is the transition logic level and the model may expect a voltage slightly higher than that for a high output (perhaps at least 2.5V).
Normal logic levels are 0V or 5V.
Why are you applying only 2V?

 

2V is the transition logic level and the model may expect a voltage slightly higher than that for a high output.
Normal logic levels are 0V or 5V.
Why are you applying only 2V?

I know it's 0 and 5V, but seeing that voltage range on DigiKey struck me as odd, so I wondered if my theoretical knowledge doesn't match my practical experience.

 

You're using a "SN74AHCT1G08" and the datasheet fragment is for a "74LVC". THEY ARE NOT THE SAME PART! My apologies for yelling.

 

I know it's 0 and 5V, but seeing that voltage range on DigiKey struck me as odd, so I wondered if my theoretical knowledge doesn't match my practical experience.

A Spice model can't/doesn't exhibit all the characteristics of a real device.
And the voltage spread for those switching parameters are for manufacturing variations, which occur between different units or manufacturing batches.

There is always some difference between device models and real devices, so a simulation will never exactly match a real circuits operation.

 

so you are lying to simulator (using HCT part but assuming LVC part) and expecting simulator to somehow catch it and tell the truth?


hmm, my bad. i fell into same trap - just checked and Vih threshold for both LVC and HCT is 2V so while not a good idea to sit on the very edge, this should work.


here is document from TI on this:
https://www.ti.com/lit/an/scla011/scla011.pdf

 

this should work.

What is "this"?
Certainly not the simulation.

 

What is "this"?
Certainly not the simulation.

why not?

if the model is correct for 74HCT, then for Vcc=5V input voltages greater or equal to 2V should be interpreted as logic 1.
last i checked 2.000V >= 2 evaluates as true hence logic 1

since logic gate is AND, and inputs are true, output should be true as well, and therefore reach at least 2.4V

here one from Wikipedia/TI:
.

 

why not?

Because simulated models typically use "typical" not worst-case values.
Thus, for example, my Spice models for the 74HCxxx logic family uses 1/2 the supply voltage as the logic-level change-state values, which is likely typical of that CMOS family (sim below for Vcc=5.5V):

 

yes but that is HC and not HCT series. they have different thresholds.
HC, AHC and AC are symmetrical (as seen in #8) while TTL compatible HCT, AHCT, ABT and ACT are not.

 

yes but that is HC and not HCT series. they have different thresholds.

Yes.
But don't know how well the Spice models track that.

 

I think post #10 and #11 are both correct.
Apparently, the (PSpice) model doesn't simulate the behavior of being driven by TTL input levels.
An easy way to check is for the OP to change the input levels to 5v CMOS levels and verify it works correctly.

 

Yes.
But don't know how well the Spice models track that.

exactly what i said:

if the model is correct for 74HCT,...

 

exactly what i said:

So I seemed to have missed your point.
It is known that most Spice models don't use worst-case values, which are the values you are showing.