Hi All. I was looking into some RF PCB designs lately. It seems that every time a RF signal carrying trace is drawn, the entire trace is totally exposed with no solder mask on it. It seems that the copper trace is totally exposed to the elements. I am attaching a few pics to show what I mean.

Here are my questions:
1) What is the reason behind these RF traces being deliberately left bare open without solder mask?
2) Under what conditions should such traces be left bare open? ( In other words, are there non-RF related situations that would warrant this kind of exposed traces? )
3) If you look closely, the ground plane next to the RF trace is also bare open for a certain small limited width. Why is the ground plane also bare? Is it a CPWG?
4) Also, the area around where the connector is soldered is also bare and has exposed copper ( please see ADRF5141-EVALZ below). Why is this so?
Thank you for the replies!




AD8285CP-EBZ




ADRF5141-EVALZ



EVAL-ADRF5044




https://www.renesas.com/en/products...ability-spst-absorptive-rf-switch-kz#overview

 

Impedance control becomes more and more critical as you go to higher and higher frequencies. The dielectric properties of the PCB substrate material used for RF applications can be tightly controlled, but the properties of the soldermask material is harder to regulate, so they are left bare so that the material next to the trace is air, which has a lot less variation.