I'm wondering how difficult it would be to replace a 40 bit shift register (s2519) with static ram? Would it be a simple or complicated circuit?

Thanks,

Justin

 

Well, they don’t do the same thing. What are you trying to do?

 

Well, they don’t do the same thing. What are you trying to do?

Well, they both store data just in a different way. I'm looking to use it for a video buffer in a home built 8 bit computer. Thanks.

 

https://oshwlab.com/szillat/2519-fixed

 

https://oshwlab.com/szillat/2519-fixed

Thanks. I'm familiar with that solution but I was hoping for something with less chips.

 

Thanks. I'm familiar with that solution but I was hoping for something with less chips.

It depends on what your circuit does. If you want to be faithful to the apple-1 design that solution will do the trick. If you want to use SRAM like I did on an old video display then the DL TV typewriter cookbook video version like I built long ago will work.



I used 2114 SRAM chips for separate character and video graphics (8080 for video processor) memory with a 8-bit shift register (74165) to clock out the video pixel bits
https://www.ti.com/lit/ds/symlink/sn74ls165a.pdf
https://www.princeton.edu/~mae412/HANDOUTS/Datasheets/2114.pdf

https://archive.org/details/tvtcb_doc

 

Let’s ignore the SRAM solution for now.
What is your setup and what are you trying to do?

 

There are several ways to approach implementing a video buffer. As usually, the each have their pros and cons and the devil is in the details of exactly what you are trying to achieve and what is important and what is not important.

 

It depends on what your circuit does. If you want to be faithful to the apple-1 design that solution will do the trick. If you want to use SRAM like I did on an old video display then the DL TV typewriter cookbook video version like I built long ago will work.

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I used 2114 SRAM chips for separate character and video graphics (8080 for video processor) memory with a 8-bit shift register to clock out the video pixel bits
https://www.princeton.edu/~mae412/HANDOUTS/Datasheets/2114.pdf

https://archive.org/details/tvtcb_doc

Thanks for the links. I'm just planning right now and I like the Apple 1 design but since the s2519 and other chips are hard to find and/or expensive I thought maybe an SRAM and a few other chips might be a solution to replace it. I just don't understand enough how the chips work to know to do it. Have you seen a simple SRAM circuit for the video that could drop in replace the s2519 using only a few chips?

 

Let’s ignore the SRAM solution for now.
What is your setup and what are you trying to do?

I'm thinking of building similar to Apple 1 with easier/cheaper to find chips for the video section.

 

There are several ways to approach implementing a video buffer. As usually, the each have their pros and cons and the devil is in the details of exactly what you are trying to achieve and what is important and what is not important.

My other replies should give a better idea of what I'm trying to do. Ideally replacing the s2519 and 2504/1404 chips from the Apple 1 design with a similar number of cheaper and easier to source chips would be good. Thanks.

 

Thanks for the links. I'm just planning right now and I like the Apple 1 design but since the s2519 and other chips are hard to find and/or expensive I thought maybe an SRAM and a few other chips might be a solution to replace it. I just don't understand enough how the chips work to know to do it. Have you seen a simple SRAM circuit for the video that could drop in replace the s2519 using only a few chips?

The simple answer is not easily with a few chips if you want to keep it a TTL/CMOS logic family level design.
http://www.righto.com/2022/04/inside-apple-1s-shift-register-memory.html
http://www.bitsavers.org/pdf/apple/apple_I/AppleI_Manual.pdf

Today you could build design and build the entire display using a 8-bit microcontroller and a few external parts for video levels and sync.
https://forum.allaboutcircuits.com/threads/pic18-q43-ntsc-b-w-video-signal-demo.175611/post-1586729

 

My other replies should give a better idea of what I'm trying to do. Ideally replacing the s2519 and 2504/1404 chips from the Apple 1 design with a similar number of cheaper and easier to source chips would be good. Thanks.

Since I'm not familiar with the Apple 1 video buffering system, just knowing that you want to replace part of it with something else doesn't put me in a position to help much. Good luck, there's certainly folks here much better situated to help you.

 

The simple answer is not easily with a few chips if you want to keep it a TTL/CMOS logic family level design.
http://www.righto.com/2022/04/inside-apple-1s-shift-register-memory.html
http://www.bitsavers.org/pdf/apple/apple_I/AppleI_Manual.pdf

Today you could build design and build the entire display using a 8-bit microcontroller and a few external parts for video levels and sync.
https://forum.allaboutcircuits.com/threads/pic18-q43-ntsc-b-w-video-signal-demo.175611/post-1586729

I just thought maybe an SRAM with supporting chips wouldn't be that difficult but I guess that was wishful thinking. I'm reading through the TV typewriter cookbook right now trying to learn more about it. I would like to keep things period correct for the Apple 1 but I'm open to newer technology if it isn't too obvious. Thanks again.

 

I guess I'm not that nostalgic for old technology having spent so much time keeping archaic systems running over the decades. It was cool building it long ago because it was somewhat current technology then.

The fun wasn't making a copy of a design, the fun was making your own design work using basic principles.

Some logic diagrams of that machine from my old design book for the graphics display.
Old design notes/scribbles on decodes and counters for this that I currently have only a faint memory of. The upper address lines were used as decode addresses and A15 was used as a master gate to switch to CPU control from TIMING control from the display address counters. The bank address decoder was a 74ls42 to access the boot rom, cpu memory, character generator memory, graphic memory, address counters for the video dot generator and I/O for the S100 bus. The INT pin was tied to a rs4020 14 bit counter that I think generated a video line based interrupt for the 8080. The memory was static 2114 (1k *4 bits) chips so no need for interrupts for that. Tri-state buffers connected to the bank address decoder separated data lines from the devices. Can't remember the exact resolution but the graphics frame buffer was only 2k *8bits, with a 1k 8080 GPU program ram and 1K character memory for the RO-3-2513 5*7 dot matrix chip.

 

I did the same thing with a Motorola MC6809 design.
Basically, you need a shift register that is continuously fed with data from SRAM that holds a bit map of your screen.

 

I guess I'm not that nostalgic for old technology having spent so much time keeping archaic systems running over the decades. It was cool building it long ago because it was somewhat current technology then.

The fun wasn't making a copy of a design, the fun was making your own design work using basic principles.

Some logic diagrams of that machine from my old design book for the graphics display.
Old design notes/scribbles on decodes and counters for this that I currently have only a faint memory of. The upper address lines were used as decode addresses and A15 was used as a master gate to switch to CPU control from TIMING control from the display address counters. The bank address decoder was a 74ls42 to access the boot rom, cpu memory, character generator memory, graphic memory, address counters for the video dot generator and I/O for the S100 bus. The INT pin was tied to a rs4020 14 bit counter that I think generated a video line based interrupt for the 8080. The memory was static 2114 (1k *4 bits) chips so no need for interrupts for that. Tri-state buffers connected to the bank address decoder separated data lines from the devices. Can't remember the exact resolution but the graphics frame buffer was only 2k *8bits, with a 1k 8080 GPU program ram and 1K character memory for the RO-3-2513 5*7 dot matrix chip.

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I find the old technology interesting but I don't know it well enough to make my own designs yet so I figured copy others and learn more about it. Thanks for the diagrams! Is there a chance you have a higher resolution of them? When I zoom in they are quite fuzzy.

 

I did the same thing with a Motorola MC6809 design.
Basically, you need a shift register that is continuously fed with data from SRAM that holds a bit map of your screen.

Thanks for the information!

 

I find the old technology interesting but I don't know it well enough to make my own designs yet so I figured copy others and learn more about it. Thanks for the diagrams! Is there a chance you have a higher resolution of them? When I zoom in they are quite fuzzy.

Those are just doodles that won't mean much unless you have most of the design in your head like I did back them. This was exploring some ideas about how to switch from CPU memory addressing (8080 boot PROM/SRAM banking) to graphic memory addressing from video counters or the GPU using tri-state buffers.

 

Those are just doodles that won't mean much unless you have most of the design in your head like I did back them. This was exploring some ideas about how to switch from CPU memory addressing (8080 boot PROM/SRAM banking) to graphic memory addressing from video counters or the GPU using tri-state buffers.

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That's much clearer. You're right, I don't quite follow what you're doing there.